/*
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* Licensed to the Apache Software Foundation (ASF) under one
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* or more contributor license agreements. See the NOTICE file
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* distributed with this work for additional information
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* regarding copyright ownership. The ASF licenses this file
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* to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance
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* with the License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing,
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* software distributed under the License is distributed on an
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* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
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* KIND, either express or implied. See the License for the
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* specific language governing permissions and limitations
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* under the License.
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*/
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#include <assert.h>
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#include "os/mynewt.h"
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#include "hal/hal_os_tick.h"
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#include "nrf.h"
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#include "mcu/cmsis_nvic.h"
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#include "mcu/mcu_sim.h"
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#include <time_machine.h>
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#include <NRF_HWLowL.h>
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#include <NRF_HW_model_top.h>
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#include <NRF_RTC.h>
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#include <hal/nrf_rtc.h>
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/* The OS scheduler requires a low-frequency timer. */
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#if MYNEWT_VAL(OS_SCHEDULING) && !MYNEWT_VAL(MCU_LFCLK_SOURCE)
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#error The OS scheduler requires a low-frequency timer; configure MCU_LFCLK_SOURCE
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#endif
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#define RTC_FREQ 32768 /* in Hz */
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#define OS_TICK_TIMER NRF_RTC1
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#define OS_TICK_IRQ RTC1_IRQn
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#define OS_TICK_CMPREG 3 /* generate timer interrupt */
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#define RTC_COMPARE_INT_MASK(ccreg) (1UL << ((ccreg) + 16))
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struct hal_os_tick
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{
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int ticks_per_ostick;
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os_time_t max_idle_ticks;
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uint32_t lastocmp;
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};
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struct hal_os_tick g_hal_os_tick;
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/*
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* Implement (x - y) where the range of both 'x' and 'y' is limited to 24-bits.
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*
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* For example:
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*
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* sub24(0, 0xffffff) = 1
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* sub24(0xffffff, 0xfffffe) = 1
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* sub24(0xffffff, 0) = -1
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* sub24(0x7fffff, 0) = 8388607
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* sub24(0x800000, 0) = -8388608
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*/
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static inline int
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sub24(uint32_t x, uint32_t y)
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{
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int result;
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assert(x <= 0xffffff);
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assert(y <= 0xffffff);
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result = x - y;
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if (result & 0x800000) {
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return (result | 0xff800000);
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} else {
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return (result & 0x007fffff);
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}
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}
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static inline uint32_t
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nrf52_os_tick_counter(void)
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{
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return nrf_rtc_counter_get(OS_TICK_TIMER);
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}
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static inline void
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nrf52_os_tick_set_ocmp(uint32_t ocmp)
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{
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int delta;
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uint32_t counter;
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OS_ASSERT_CRITICAL();
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while (1) {
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ocmp &= 0xffffff;
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nrf_rtc_cc_set(OS_TICK_TIMER, OS_TICK_CMPREG, ocmp);
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counter = nrf52_os_tick_counter();
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/*
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* From nRF52 Product specification
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*
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* - If Counter is 'N' writing (N) or (N + 1) to CC register
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* may not trigger a compare event.
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*
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* - If Counter is 'N' writing (N + 2) to CC register is guaranteed
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* to trigger a compare event at 'N + 2'.
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*/
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delta = sub24(ocmp, counter);
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if (delta > 2) {
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break;
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}
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ocmp += g_hal_os_tick.ticks_per_ostick;
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}
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}
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static void
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nrf52_timer_handler(void)
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{
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int delta;
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int ticks;
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os_sr_t sr;
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uint32_t counter;
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os_trace_isr_enter();
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OS_ENTER_CRITICAL(sr);
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/* Calculate elapsed ticks and advance OS time. */
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counter = nrf52_os_tick_counter();
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delta = sub24(counter, g_hal_os_tick.lastocmp);
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ticks = delta / g_hal_os_tick.ticks_per_ostick;
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os_time_advance(ticks);
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/* Clear timer interrupt */
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OS_TICK_TIMER->EVENTS_COMPARE[OS_TICK_CMPREG] = 0;
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/* Update the time associated with the most recent tick */
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g_hal_os_tick.lastocmp = (g_hal_os_tick.lastocmp +
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(ticks * g_hal_os_tick.ticks_per_ostick)) & 0xffffff;
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/* Update the output compare to interrupt at the next tick */
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nrf52_os_tick_set_ocmp(g_hal_os_tick.lastocmp + g_hal_os_tick.ticks_per_ostick);
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OS_EXIT_CRITICAL(sr);
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os_trace_isr_exit();
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}
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/* Wait For Interrupt */
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void
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__WFI(void)
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{
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while (hw_irq_ctrl_get_irq_status() == 0) {
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tm_tick();
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}
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}
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void
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os_tick_idle(os_time_t ticks)
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{
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uint32_t ocmp;
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OS_ASSERT_CRITICAL();
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if (ticks > 0) {
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/*
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* Enter tickless regime during long idle durations.
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*/
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if (ticks > g_hal_os_tick.max_idle_ticks) {
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ticks = g_hal_os_tick.max_idle_ticks;
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}
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ocmp = g_hal_os_tick.lastocmp + (ticks*g_hal_os_tick.ticks_per_ostick);
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nrf52_os_tick_set_ocmp(ocmp);
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}
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__WFI();
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if (ticks > 0) {
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/*
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* Update OS time before anything else when coming out of
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* the tickless regime.
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*/
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nrf52_timer_handler();
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}
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}
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extern void nrf_rtc_regw_sideeffects(int i);
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void
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os_tick_init(uint32_t os_ticks_per_sec, int prio)
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{
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uint32_t sr;
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assert(RTC_FREQ % os_ticks_per_sec == 0);
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g_hal_os_tick.lastocmp = 0;
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g_hal_os_tick.ticks_per_ostick = RTC_FREQ / os_ticks_per_sec;
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/*
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* The maximum number of OS ticks allowed to elapse during idle is
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* limited to 1/4th the number of timer ticks before the 24-bit counter
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* rolls over.
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*/
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g_hal_os_tick.max_idle_ticks = (1UL << 22) / g_hal_os_tick.ticks_per_ostick;
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/* disable interrupts */
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OS_ENTER_CRITICAL(sr);
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/* Set isr in vector table and enable interrupt */
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NVIC_SetPriority(OS_TICK_IRQ, prio);
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NVIC_SetVector(OS_TICK_IRQ, (uint32_t)nrf52_timer_handler);
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NVIC_EnableIRQ(OS_TICK_IRQ);
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/*
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* Program the OS_TICK_TIMER to operate at 32KHz and trigger an output
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* compare interrupt at a rate of 'os_ticks_per_sec'.
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*/
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nrf_rtc_task_trigger(OS_TICK_TIMER, NRF_RTC_TASK_STOP);
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nrf_rtc_task_trigger(OS_TICK_TIMER, NRF_RTC_TASK_CLEAR);
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nrf_rtc_event_disable(OS_TICK_TIMER, 0xffffffff);
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nrf_rtc_int_disable(OS_TICK_TIMER, 0xffffffff);
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nrf_rtc_int_enable(OS_TICK_TIMER, RTC_COMPARE_INT_MASK(OS_TICK_CMPREG));
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OS_TICK_TIMER->EVENTS_COMPARE[OS_TICK_CMPREG] = 0;
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nrf_rtc_cc_set(OS_TICK_TIMER, OS_TICK_CMPREG, g_hal_os_tick.ticks_per_ostick);
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nrf_rtc_task_trigger(OS_TICK_TIMER, NRF_RTC_TASK_START);
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OS_EXIT_CRITICAL(sr);
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}
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