#ifndef _NIMBLE_GLUE_H_
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#define _NIMBLE_GLUE_H_
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#include "PanSeries.h"
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#include "stack/ble_types.h"
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#include "pan_ble_stack.h"
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/* Here we borrow NVIC ADC IRQ as BLE event for LL interrupt offloading */
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#define BLE_EVENT_PROC_IRQ ADC_IRQHandler
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#define BLE_EVENT_PROC_IRQn ADC_IRQn
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///*constant flags to be used with ble_buff_hdr_t:ble_hdr_flags*/
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//#define BLE_BUFF_HDR_STRT_PKT (1<<0)
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//#define BLE_BUFF_HDR_CNTRL_PKT (1<<1)
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//#define BLE_BUFF_HDR_BUFF_FRGMNTD (1<<2)
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//#define BLE_BUFF_HDR_EVNT_CMD_PCKT (1<<3)
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//#define BLE_BUFF_HDR_ACL_DATA_PCKT (1<<4)
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//#if defined __GNUC__
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//#define RAM_CODE __attribute__((noinline)) __attribute__((long_call,section(".ramfunc")))
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//#else
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//#define RAM_CODE __attribute__((section(".ramfunc")))
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//#endif
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//#define os_Pool_Def(type) os_pool_def_t os_pool_##type
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//#define os_Pool(type) &os_pool_##type
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//#define os_Pool_Def_extern(type) extern os_pool_def_t os_pool_##type
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//typedef struct {
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// uint8_t sleep_clock_source;
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// uint16_t sleep_clock_accuracy;
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// uint8_t max_num_of_states;
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// int8_t tx_power;
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// void * (*pf_mem_init)(uint32_t size);
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//
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// // NOT Release
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// uint8_t link_layer_debug;
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// struct {
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// uint8_t os_drift_time;
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// uint8_t reg_time;
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// } timings;
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// uint8_t agc_cfg_mode;
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//} pan_ble_cfg;
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/// Priority used for thread control.
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typedef enum
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{
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os_priority_high,
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os_priority_normal,
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os_priority_low,
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} os_priority;
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///*
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// * @brief structure that hold some information about the data transmitted across layers.
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// */
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//typedef struct ble_buff_hdr_st
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//{
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// uint8_t *buff_start;
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// struct ble_buff_hdr_st *next_pkt;
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// uint16_t total_len;
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// uint16_t data_offset;
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// uint16_t data_size;
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// uint8_t ble_hdr_flags;
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//} ble_buff_hdr_t, *ble_buff_hdr_p;
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//typedef struct _mem_blck_t
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//{
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// /* 8 bits | 8 bits | 8 bits | 8 bits *
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// * Free memory chunk flag | sub-pool number | reserved | handle_id */
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// uint32_t flag;
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// struct _mem_blck_t *next;
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//} mem_blck_t;
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//typedef struct
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//{
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// uint32_t blck_size; /* block size */
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// mem_blck_t *next_blck; /* next free block */
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//} os_pool_def_t;
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//os_Pool_Def_extern(ble_buff_hdr_t);
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typedef void (*pan_ble_hci_evt_cbk)(uint8_t *p_evt, uint16_t evt_len);
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typedef void (*pan_ble_hci_acl_cbk)(uint8_t *p_acl, uint16_t acl_len);
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//extern uint32_t llhwc_slptmr_get_remain(void);
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extern uint8_t rf_check_sleep_state(void);
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extern void pan_ble_hci_init(pan_ble_hci_evt_cbk p_evt_cbk, pan_ble_hci_acl_cbk p_acl_cbk);
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//extern void hci_event_handler(void *handler);
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extern void pan_ble_init(const pan_ble_cfg *cfg);
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//extern void *os_mem_pool_alloc(os_pool_def_t *pool);
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extern void pan_ble_handle(void);
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extern void pan_ble_irq(void);
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/**API set public address */
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extern uint32_t db_set_bd_address(uint8_t *bd_addr);
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extern void init_controller_rc_calib(void);
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typedef int (*PanMdcSemphrGiveCback_t)(void);
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typedef int (*host_copydata_t)(void *from, void *dst, uint16_t len);
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extern void pan_ll_register_semphr_cback(PanMdcSemphrGiveCback_t func);
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extern void pan_ll_register_hostcopy_cb(host_copydata_t func);
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extern uint32_t pan_ble_hci_acl_nimble_handle(uint8_t *p_data, uint16_t data_len);
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extern LlState_t LL_SetBdAddr(uint8_t *pAddr, uint32_t len);
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extern uint32_t pan_get_ll_idle_time(void);
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extern void pan_update_stimer(void);
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extern void pan_req_new_tx_power(int8_t txPower);
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#endif /* _NIMBLE_GLUE_H_ */
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