/**************************************************************************
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* @file pan_lp.h
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* @version V1.00
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* $Revision: 3 $
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* $Date: 2023/11/08 $
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* @brief Panchip series lowpower driver header file
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*
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* @note
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* Copyright (C) 2023 Panchip Technology Corp. All rights reserved.
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*****************************************************************************/
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#ifndef __PAN_LP_H__
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#define __PAN_LP_H__
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/**
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* @brief Lowpower Interface
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* @defgroup lowpower_interface Lowpower Interface
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* @{
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*/
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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#define LP_EXT_P56_WK_EN (1) /*!< Gpio p56 wake up enable */
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#define LP_EXT_P56_WK_DISABLE (0) /*!< Gpio p56 wake up disable */
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/**@defgroup LP_GPIO_WK_EDGE_FLAG Lowpower gpio wake up edge
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* @brief Lowpower gpio wake up edge select definitions
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* @{ */
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#define LP_EXT_P56_WK_EDGE_LOW (0) /*!< Gpio p56 wake up by falling edge */
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#define LP_EXT_P56_WK_EDGE_HIGH (1) /*!< Gpio p56 wake up by rising edge */
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/**@} */
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#define LP_SLPTMR_CH0 (0)
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#define LP_SLPTMR_CH1 (1)
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#define LP_SLPTMR_CH2 (2)
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#define LP_MODE_SEL_SLEEP_MODE (0)
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#define LP_MODE_SEL_DEEPSLEEP_MODE (1)
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#define LP_MODE_SEL_STANDBY_M1_MODE (2)
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#define LP_MODE_SEL_STANDBY_M0_MODE (3)
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#define LP_DEEPSLEEP_MODE1 (1)
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#define LP_DEEPSLEEP_MODE2 (2)
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#define LP_DEEPSLEEP_MODE3 (3)
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#define LP_STANDBY_M1_MODE_SEL LP_STANDBY_M1_MODE1
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#define LP_STANDBY_M1_MODE1 (1)
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#define LP_STANDBY_M1_MODE2 (2)
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#define LP_STANDBY_M1_MODE3 (3)
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#define LP_STBM1_WAKEUP_SRC_GPIO BIT0
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#define LP_STBM1_WAKEUP_SRC_SLPTMR BIT1
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#define LP_RETENTION_SRAM_NONE (0)
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#define LP_RETENTION_SRAM_BLOCK0 BIT0 /* 32 KB */
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#define LP_RETENTION_SRAM_BLOCK1 BIT1 /* 16 KB */
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#define LP_RETENTION_SRAM_DECRYPT BIT2 /* 256 B */
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#define LP_RETENTION_SRAM_PHY_REGS BIT3 /* 256 B PHY SEQ RAM + PHY Registers */
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#define LP_RETENTION_SRAM_LL BIT4 /* 8 KB */
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#define LP_RETENTION_SRAM_ALL (BIT0 | BIT1 | BIT2 | BIT3 | BIT4)
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/**
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* @brief This function enable lowpower intterrupt
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* @param[in] ana: where ana is analog module
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* @param[in] NewState: new state of interrupt mask
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* ANAC_INT_LP_INT_EN_Msk
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* @return none
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*/
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__STATIC_INLINE void LP_EnableInt(ANA_T *ana,FunctionalState NewState)
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{
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(NewState == ENABLE)?(ana->LP_INT_CTRL |= ANAC_INT_LP_INT_EN_Msk):(ana->LP_INT_CTRL &= ~ANAC_INT_LP_INT_EN_Msk);
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}
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/**
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* @brief This function wait to clear wake up flag
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* @param[in] ana: where ana is analog module
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* @param[in] u32Mask: bit need to be cleared
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* @return none
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*/
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__STATIC_INLINE void LP_ClearWakeFlag(ANA_T *ana,uint32_t u32Mask)
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{
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ana->LP_INT_CTRL |= u32Mask;
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}
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/**
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* @brief This function enable hpldo ready or not(0: need wait ready, 1: do not care ready)
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* @param[in] ana: where ana is analog module
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* @param[in] NewState: new state of hpldo ready bypass signal
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* @return none
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*/
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__STATIC_INLINE void LP_HpldoRdyBypassEn(ANA_T *ana,FunctionalState NewState)
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{
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(NewState == ENABLE)?(ana->LP_DLY_CTRL_3V |= ANAC_HPLDO_RDY_BYPASS_Msk):(ana->LP_DLY_CTRL_3V &= ~ANAC_HPLDO_RDY_BYPASS_Msk);
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}
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/**
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* @brief This function enable fast clk delay or not
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* @param[in] ana: where ana is analog module
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* @param[in] NewState: new state of hpldo ready bypass signal
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* @return none
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*/
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__STATIC_INLINE void LP_FastClkDelayEn(ANA_T *ana,FunctionalState NewState)
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{
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(NewState == ENABLE)?(ana->LP_DLY_CTRL_3V |= ANAC_32KCLK_DLY_EN_Msk):(ana->LP_DLY_CTRL_3V &= ~ANAC_32KCLK_DLY_EN_Msk);
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}
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/**
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* @brief This function enable gpio p56 wake up
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* @param[in] ana: where ana is analog module base address
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* @param[in] NewState: enable or disable
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* @param[in] WkEdge: p56 wake up edge select,0-->low,1-->high
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* @return none
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*/
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void LP_SetExternalWake(ANA_T *ana,uint8_t WkEdge);
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/**
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* @brief This function set sleep time
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* @param[in] ana: where ana is analog module
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* @param[in] u32ClkCnt: where u32ClkCnt is 32k clock cnt num
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* @param[in] idx: channel index of sleeptimer, can be 0, 1, 2
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* @return none
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*/
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void LP_SetSleepTime(ANA_T *ana,uint32_t u32ClkCnt,uint8_t idx);
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/**
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* @brief This function get current 32K timer counter
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* @param[in] ana: where ana is analog module
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* @return Current 32K timer counter
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*/
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uint32_t LP_GetSlptmrCurrCount(ANA_T *ana);
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/**
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* @brief This function sets the LPLDOH (Low-Power Low-Dropout Regulator) delay count using 32kHz clock cycles.
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* @param[in] ana: Analog module base address
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* @param[in] u16Clk32Cnt: Number of 32kHz clock cycles for delay
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* @return None
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*/
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void LP_SetLpldohDelay(ANA_T *ana,uint16_t u16Clk32Cnt);
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/**
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* @brief This function used to set digital reset time
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* @param[in] ana: where ana is analog module base address
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* @param[in] u8Clk32Cnt: where u8Clk32Cnt is 32k clock period cnt
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* @return none
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*/
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void LP_SetWakeDelay(ANA_T *ana,uint16_t u16Clk32Cnt);
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/**
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* @brief This function sets the sleep mode for the specified analog module.
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* @param[in] ana: Analog module base address
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* @param[in] mode: Sleep mode configuration
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* @return None
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*/
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void LP_SetSleepMode(ANA_T *ana,uint8_t mode);
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/**
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* @brief This function set sleep mode config
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* @param[in] ana: Select analog module
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* @param[in] enterCyclically: Enable ARM Sleep-On-Exit Feature or not
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* @return none
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*/
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void LP_EnterSleepMode(ANA_T *ana, bool enterCyclically);
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/**
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* @brief This function sets the deep sleep mode configuration.
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* @param[in] ana: Analog module base address
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* @param[in] enterCyclically: Determines whether to cycle into low power
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* @param[in] powerCtrl: Power control configuration
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* @param[in] dpMode: Deep sleep mode configuration
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* @return None
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*/
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void LP_EnterDeepSleepMode(ANA_T *ana, bool enterCyclically, uint8_t powerCtrl, uint8_t dpMode);
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/**
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* @brief This function sets the Standby Mode 1 configuration.
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* @param[in] ana: Analog module base address
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* @param[in] powerCtrl: Power control of SRAMS in lp mode
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* @param[in] wakeupWithoutReset: Do not reset (continue run) after waking up
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*/
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void LP_EnterStandbyMode1(ANA_T *ana, uint8_t powerCtrl, bool wakeupWithoutReset);
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/**
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* @brief This function sets the Standby Mode 0 configuration.
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* @param[in] ana: Analog module base address
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* @param[in] enableClk32k: Enable 32K low speed clock in lp mode for special purpose, such as BOD/LVD wakeup
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*/
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void LP_EnterStandbyMode0(ANA_T *ana, bool enableClk32k);
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/**@} */
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#ifdef __cplusplus
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}
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#endif
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#endif /* __PAN_LP_H__ */
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