/*
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* Licensed to the Apache Software Foundation (ASF) under one
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* or more contributor license agreements. See the NOTICE file
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* distributed with this work for additional information
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* regarding copyright ownership. The ASF licenses this file
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* to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance
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* with the License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing,
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* software distributed under the License is distributed on an
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* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
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* KIND, either express or implied. See the License for the
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* specific language governing permissions and limitations
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* under the License.
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*/
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#include <stdint.h>
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#include <stddef.h>
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#include <assert.h>
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#include "os/mynewt.h"
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#include "nrfx.h"
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#include "flash_map/flash_map.h"
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#include "hal/hal_bsp.h"
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#include "hal/hal_flash.h"
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#include "hal/hal_system.h"
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#include "mcu/nrf52_hal.h"
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#include "mcu/nrf52_periph.h"
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#include "mcu/native_bsp.h"
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#include "bsp/bsp.h"
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#include "defs/sections.h"
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#include "uart_hal/uart_hal.h"
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#include "uart/uart.h"
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/*
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* What memory to include in coredump.
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*/
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static const struct hal_bsp_mem_dump dump_cfg[] = {
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[0] = {
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.hbmd_start = &_ram_start,
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.hbmd_size = RAM_SIZE
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}
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};
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const struct hal_flash *
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hal_bsp_flash_dev(uint8_t id)
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{
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switch (id) {
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case 0:
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return &native_flash_dev;
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default:
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return NULL;
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}
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}
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const struct hal_bsp_mem_dump *
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hal_bsp_core_dump(int *area_cnt)
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{
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*area_cnt = sizeof(dump_cfg) / sizeof(dump_cfg[0]);
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return dump_cfg;
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}
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int
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hal_bsp_power_state(int state)
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{
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return (0);
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}
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/**
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* Returns the configured priority for the given interrupt. If no priority
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* configured, return the priority passed in
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*
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* @param irq_num
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* @param pri
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*
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* @return uint32_t
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*/
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uint32_t
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hal_bsp_get_nvic_priority(int irq_num, uint32_t pri)
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{
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uint32_t cfg_pri;
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switch (irq_num) {
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/* Radio gets highest priority */
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case RADIO_IRQn:
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cfg_pri = 0;
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break;
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default:
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cfg_pri = pri;
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}
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return cfg_pri;
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}
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static void
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nrf52_periph_create_timers(void)
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{
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int rc;
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(void)rc;
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#if MYNEWT_VAL(TIMER_0)
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rc = hal_timer_init(0, NULL);
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assert(rc == 0);
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#endif
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#if MYNEWT_VAL(TIMER_1)
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rc = hal_timer_init(1, NULL);
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assert(rc == 0);
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#endif
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#if MYNEWT_VAL(TIMER_2)
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rc = hal_timer_init(2, NULL);
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assert(rc == 0);
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#endif
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#if MYNEWT_VAL(TIMER_3)
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rc = hal_timer_init(3, NULL);
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assert(rc == 0);
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#endif
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#if MYNEWT_VAL(TIMER_4)
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rc = hal_timer_init(4, NULL);
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assert(rc == 0);
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#endif
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#if MYNEWT_VAL(TIMER_5)
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rc = hal_timer_init(5, NULL);
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assert(rc == 0);
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#endif
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#if MYNEWT_VAL(OS_CPUTIME_TIMER_NUM) >= 0
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rc = os_cputime_init(MYNEWT_VAL(OS_CPUTIME_FREQ));
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assert(rc == 0);
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#endif
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}
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static struct uart_dev os_bsp_uart0;
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static struct uart_dev os_bsp_uart1;
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void
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hal_bsp_init(void)
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{
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/* Make sure system clocks have started */
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hal_system_clock_start();
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/* Create all available nRF52840 peripherals */
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// nrf52_periph_create();
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nrf52_periph_create_timers();
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int rc;
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rc = os_dev_create((struct os_dev *) &os_bsp_uart0, "uart0",
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OS_DEV_INIT_PRIMARY, 0, uart_hal_init, (void *) NULL);
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assert(rc == 0);
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rc = os_dev_create((struct os_dev *) &os_bsp_uart1, "uart1",
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OS_DEV_INIT_PRIMARY, 0, uart_hal_init, (void *) NULL);
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assert(rc == 0);
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}
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void
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hal_bsp_deinit(void)
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{
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}
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