/*
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* Licensed to the Apache Software Foundation (ASF) under one
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* or more contributor license agreements. See the NOTICE file
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* distributed with this work for additional information
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* regarding copyright ownership. The ASF licenses this file
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* to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance
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* with the License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing,
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* software distributed under the License is distributed on an
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* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
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* KIND, either express or implied. See the License for the
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* specific language governing permissions and limitations
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* under the License.
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*/
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#include "nimble_syscfg.h"
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#if MYNEWT_VAL(BLE_CONTROLLER) && !MYNEWT_VAL(MCU_DEBUG_DSER_CMAC_SHARED)
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#define MCU_DIAG_SER_DISABLE
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#endif
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#include <assert.h>
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#include <string.h>
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#include <stdbool.h>
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#include "mcu/mcu.h"
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#include <cmac_driver/cmac_shared.h>
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#include "os/os_arch.h"
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#include "os/os.h"
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#ifndef min
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#define min(_a, _b) ((_a) < (_b) ? (_a) : (_b))
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#endif
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#if MYNEWT_VAL(BLE_CONTROLLER)
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volatile struct cmac_shared_data g_cmac_shared_data __attribute__((section(".shdata")));
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#else
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volatile struct cmac_shared_data *g_cmac_shared_data;
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#include "mcu/da1469x_clock.h"
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#define MCU_DIAG_SER(_x)
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#endif
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void
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cmac_shared_init(void)
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{
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#if !MYNEWT_VAL(BLE_CONTROLLER)
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g_cmac_shared_data = (void *)(MCU_MEM_SYSRAM_START_ADDRESS +
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MEMCTRL->CMI_SHARED_BASE_REG);
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memset((void *)g_cmac_shared_data, 0, sizeof(*g_cmac_shared_data));
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g_cmac_shared_data->xtal32m_settle_us = MYNEWT_VAL(MCU_CLOCK_XTAL32M_SETTLE_TIME_US);
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g_cmac_shared_data->dcdc.enabled = DCDC->DCDC_CTRL1_REG & DCDC_DCDC_CTRL1_REG_DCDC_ENABLE_Msk;
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if (g_cmac_shared_data->dcdc.enabled) {
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g_cmac_shared_data->dcdc.v18 = DCDC->DCDC_V18_REG;
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g_cmac_shared_data->dcdc.v18p = DCDC->DCDC_V18P_REG;
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g_cmac_shared_data->dcdc.vdd = DCDC->DCDC_VDD_REG;
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g_cmac_shared_data->dcdc.v14 = DCDC->DCDC_V14_REG;
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g_cmac_shared_data->dcdc.ctrl1 = DCDC->DCDC_CTRL1_REG;
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}
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#if MYNEWT_VAL(CMAC_DEBUG_DATA_ENABLE)
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g_cmac_shared_data->debug.tx_power_override = INT8_MAX;
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#endif
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#endif
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}
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void
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cmac_shared_sync(void)
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{
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/*
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* We need to guarantee proper order of initialization here, i.e. SYS has
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* to wait until CMAC finished initialization as otherwise host may start
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* sending HCI packets which will timeout as there is no one to read them.
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*/
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#if MYNEWT_VAL(BLE_CONTROLLER)
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assert(g_cmac_shared_data.magic_cmac == 0);
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g_cmac_shared_data.magic_cmac = CMAC_SHARED_MAGIC_CMAC;
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while (g_cmac_shared_data.magic_sys != CMAC_SHARED_MAGIC_SYS);
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NVIC_SetPriority(SYS2CMAC_IRQn, 3);
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NVIC_EnableIRQ(SYS2CMAC_IRQn);
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#else
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assert(g_cmac_shared_data->magic_sys == 0);
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while (g_cmac_shared_data->magic_cmac != CMAC_SHARED_MAGIC_CMAC);
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g_cmac_shared_data->magic_sys = CMAC_SHARED_MAGIC_SYS;
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NVIC_EnableIRQ(CMAC2SYS_IRQn);
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#endif
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}
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