/*
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* Licensed to the Apache Software Foundation (ASF) under one
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* or more contributor license agreements. See the NOTICE file
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* distributed with this work for additional information
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* regarding copyright ownership. The ASF licenses this file
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* to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance
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* with the License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing,
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* software distributed under the License is distributed on an
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* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
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* KIND, either express or implied. See the License for the
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* specific language governing permissions and limitations
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* under the License.
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*/
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#include <assert.h>
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#include <string.h>
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#include <errno.h>
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#include <stdint.h>
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#include <sysinit/sysinit.h>
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#include <syscfg/syscfg.h>
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#include "os/os_mbuf.h"
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#include "os/os_mempool.h"
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#include "hal/hal_uart.h"
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#include "nimble/transport.h"
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#include "nimble/transport/hci_h4.h"
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#define TX_Q_SIZE (MYNEWT_VAL(BLE_TRANSPORT_ACL_FROM_LL_COUNT) + \
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MYNEWT_VAL(BLE_TRANSPORT_EVT_COUNT) + \
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MYNEWT_VAL(BLE_TRANSPORT_EVT_DISCARDABLE_COUNT))
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struct hci_uart_tx {
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uint8_t type;
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uint8_t sent_type;
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uint16_t len;
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uint16_t idx;
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struct os_mbuf *om;
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uint8_t *buf;
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STAILQ_ENTRY(hci_uart_tx) tx_q_next;
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};
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static STAILQ_HEAD(, hci_uart_tx) tx_q;
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static struct os_mempool pool_tx_q;
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static uint8_t pool_tx_q_buf[ OS_MEMPOOL_BYTES(TX_Q_SIZE,
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sizeof(struct hci_uart_tx)) ];
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struct hci_h4_sm hci_uart_h4sm;
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static int
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hci_uart_frame_cb(uint8_t pkt_type, void *data)
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{
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switch (pkt_type) {
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case HCI_H4_CMD:
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return ble_transport_to_ll_cmd(data);
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case HCI_H4_ACL:
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return ble_transport_to_ll_acl(data);
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default:
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assert(0);
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break;
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}
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return -1;
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}
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static int
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hci_uart_rx_char(void *arg, uint8_t data)
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{
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hci_h4_sm_rx(&hci_uart_h4sm, &data, 1);
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return 0;
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}
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static int
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hci_uart_tx_char(void *arg)
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{
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struct hci_uart_tx *tx;
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uint8_t ch;
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os_sr_t sr;
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OS_ENTER_CRITICAL(sr);
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tx = STAILQ_FIRST(&tx_q);
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OS_EXIT_CRITICAL(sr);
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if (!tx) {
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return -1;
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}
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if (!tx->sent_type) {
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tx->sent_type = 1;
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return tx->type;
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}
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switch (tx->type) {
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case HCI_H4_EVT:
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ch = tx->buf[tx->idx];
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tx->idx++;
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if (tx->idx == tx->len) {
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ble_transport_free(tx->buf);
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OS_ENTER_CRITICAL(sr);
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STAILQ_REMOVE_HEAD(&tx_q, tx_q_next);
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OS_EXIT_CRITICAL(sr);
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os_memblock_put(&pool_tx_q, tx);
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}
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break;
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case HCI_H4_ACL:
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os_mbuf_copydata(tx->om, 0, 1, &ch);
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os_mbuf_adj(tx->om, 1);
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tx->len--;
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if (tx->len == 0) {
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os_mbuf_free_chain(tx->om);
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OS_ENTER_CRITICAL(sr);
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STAILQ_REMOVE_HEAD(&tx_q, tx_q_next);
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OS_EXIT_CRITICAL(sr);
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os_memblock_put(&pool_tx_q, tx);
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}
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break;
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default:
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assert(0);
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OS_ENTER_CRITICAL(sr);
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STAILQ_REMOVE_HEAD(&tx_q, tx_q_next);
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OS_EXIT_CRITICAL(sr);
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os_memblock_put(&pool_tx_q, tx);
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}
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return ch;
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}
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static int
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hci_uart_configure(void)
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{
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enum hal_uart_parity parity;
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enum hal_uart_flow_ctl flowctl;
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int rc;
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rc = hal_uart_init_cbs(MYNEWT_VAL(BLE_TRANSPORT_UART_PORT),
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hci_uart_tx_char, NULL,
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hci_uart_rx_char, NULL);
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if (rc != 0) {
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return -1;
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}
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if (MYNEWT_VAL_CHOICE(BLE_TRANSPORT_UART_PARITY, odd)) {
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parity = HAL_UART_PARITY_ODD;
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} else if (MYNEWT_VAL_CHOICE(BLE_TRANSPORT_UART_PARITY, even)) {
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parity = HAL_UART_PARITY_EVEN;
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} else {
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parity = HAL_UART_PARITY_NONE;
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}
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if (MYNEWT_VAL_CHOICE(BLE_TRANSPORT_UART_FLOW_CONTROL, rtscts)) {
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flowctl = HAL_UART_FLOW_CTL_RTS_CTS;
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} else {
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flowctl = HAL_UART_FLOW_CTL_NONE;
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}
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rc = hal_uart_config(MYNEWT_VAL(BLE_TRANSPORT_UART_PORT),
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MYNEWT_VAL(BLE_TRANSPORT_UART_BAUDRATE),
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MYNEWT_VAL(BLE_TRANSPORT_UART_DATA_BITS),
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MYNEWT_VAL(BLE_TRANSPORT_UART_STOP_BITS),
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parity, flowctl);
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if (rc != 0) {
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return -1;
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}
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return 0;
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}
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int
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ble_transport_to_hs_evt_impl(void *buf)
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{
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struct hci_uart_tx *txe;
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os_sr_t sr;
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txe = os_memblock_get(&pool_tx_q);
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if (!txe) {
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assert(0);
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return -ENOMEM;
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}
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txe->type = HCI_H4_EVT;
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txe->sent_type = 0;
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txe->len = 2 + ((uint8_t *)buf)[1];
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txe->buf = buf;
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txe->idx = 0;
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txe->om = NULL;
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OS_ENTER_CRITICAL(sr);
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STAILQ_INSERT_TAIL(&tx_q, txe, tx_q_next);
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OS_EXIT_CRITICAL(sr);
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hal_uart_start_tx(MYNEWT_VAL(BLE_TRANSPORT_UART_PORT));
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return 0;
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}
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int
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ble_transport_to_hs_acl_impl(struct os_mbuf *om)
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{
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struct hci_uart_tx *txe;
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os_sr_t sr;
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txe = os_memblock_get(&pool_tx_q);
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if (!txe) {
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assert(0);
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return -ENOMEM;
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}
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txe->type = HCI_H4_ACL;
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txe->sent_type = 0;
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txe->len = OS_MBUF_PKTLEN(om);
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txe->idx = 0;
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txe->buf = NULL;
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txe->om = om;
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OS_ENTER_CRITICAL(sr);
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STAILQ_INSERT_TAIL(&tx_q, txe, tx_q_next);
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OS_EXIT_CRITICAL(sr);
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hal_uart_start_tx(MYNEWT_VAL(BLE_TRANSPORT_UART_PORT));
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return 0;
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}
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void
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ble_transport_hs_init(void)
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{
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int rc;
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SYSINIT_ASSERT_ACTIVE();
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rc = hci_uart_configure();
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SYSINIT_PANIC_ASSERT(rc == 0);
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rc = os_mempool_init(&pool_tx_q, TX_Q_SIZE, sizeof(struct hci_uart_tx),
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pool_tx_q_buf, "hci_uart_tx_q");
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SYSINIT_PANIC_ASSERT(rc == 0);
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hci_h4_sm_init(&hci_uart_h4sm, &hci_h4_allocs_from_hs, hci_uart_frame_cb);
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STAILQ_INIT(&tx_q);
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}
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