#include "PanSeries.h"
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#include "pan_lp.h"
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#include "pan_clk.h"
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/**
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* @brief This function enable gpio p56 wake up
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* @param[in] ana: where ana is analog module
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* @param[in] WkEdge: wake up edge select,0-->low,1-->high
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* @return none
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*/
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void LP_SetExternalWake(ANA_T *ana,uint8_t WkEdge)
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{
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if(WkEdge){
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ana->LP_FL_CTRL_3V |= ANAC_FL_EXT_WAKEUP_SEL_Msk_3v;
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}else{
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ana->LP_FL_CTRL_3V &= ~ANAC_FL_EXT_WAKEUP_SEL_Msk_3v;
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}
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}
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/**
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* @brief This function set sleep time
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* @param[in] ana: where ana is analog module
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* @param[in] u32ClkCnt: where u32ClkCnt is 32k clock cnt num
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* @param[in] idx: where idx is 0,1, 2
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* @return none
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*/
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void LP_SetSleepTime(ANA_T *ana,uint32_t u32ClkCnt,uint8_t idx)
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{
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((__IO uint32_t *)(&(ana)->LP_SPACING_TIME0))[idx] = u32ClkCnt;
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}
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/**
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* @brief This function set delay time used for standby_m0 mode for wait LPLDOH ready
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* @param[in] ana: where ana is analog module
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* @param[in] u8Clk32Cnt: where u8Clk32Cnt is 32k clock period cnt
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* @return none
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*/
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void LP_SetLpldohDelay(ANA_T *ana,uint16_t u16Clk32Cnt)
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{
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uint32_t tmp_reg;
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tmp_reg = ana->LP_DLY_CTRL_3V;
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tmp_reg &= ~(ANAC_LPLDOH_DLY_TIME_Msk_3v);
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tmp_reg |= (u16Clk32Cnt << ANAC_LPLDOH_DLY_TIME_Pos_3v);
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ana->LP_DLY_CTRL_3V = tmp_reg;
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}
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/**
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* @brief This function set delay time used for fast clock ready
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* @param[in] ana: where ana is analog module
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* @param[in] u8Clk32Cnt: where u8Clk32Cnt is 32k clock period cnt
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* @return none
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*/
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void LP_SetWakeDelay(ANA_T *ana,uint16_t u16Clk32Cnt)
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{
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uint32_t tmp_reg;
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tmp_reg = ana->LP_DLY_CTRL_3V;
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tmp_reg &= ~(ANAC_32KCLK_DLY_TIME_Msk);
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tmp_reg |= (u16Clk32Cnt << ANAC_32KCLK_DLY_TIME_Pos);
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ana->LP_DLY_CTRL_3V = tmp_reg;
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}
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/**
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* @brief This function set delay time used for fast clock ready
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* @param[in] ana: where ana is analog module
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* @param[in] mode: where mode is sleep mode select
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* LP_MODE_SEL_SLEEP_MODE
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* LP_MODE_SEL_DEEPSLEEP_MODE
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* LP_MODE_SEL_STANDBY_M1_MODE
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* LP_MODE_SEL_STANDBY_M0_MODE
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*
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* @return none
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*/
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void LP_SetSleepMode(ANA_T *ana,uint8_t mode)
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{
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uint32_t tmp_reg;
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tmp_reg = ana->LP_FL_CTRL_3V;
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tmp_reg &= ~(ANAC_FL_SLEEP_MODE_SEL_Msk);
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tmp_reg |= (mode << ANAC_FL_SLEEP_MODE_SEL_Pos);
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ana->LP_FL_CTRL_3V = tmp_reg;
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}
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/**
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* @brief This function set sleep mode config
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* @param[in] ana: where ana is analog module
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* @param[in] u8ExtWkDis: where u8ExtWkDis determine whether to wake up by GPIO
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* 0:gpio can wake up
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* 1:gpio can notwake up
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* @return none
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*/
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void LP_SetSleepModeConfig(ANA_T *ana,uint32_t wkMode,bool enterCyclically)
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{
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LP_EnableInt(ana,ENABLE);
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LP_SetSleepMode(ana, LP_MODE_SEL_SLEEP_MODE);
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if((LP_WKUP_MODE_SEL_EXT_GPIO != wkMode)&&(LP_WKUP_MODE_SEL_GPIO != wkMode)){
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ana->LP_FL_CTRL_3V |= ANAC_FL_RC32K_EN_Msk_3v;
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ana->LP_FL_CTRL_3V |= ANAC_FL_SLEEP_CNT_EN_Msk;
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} else {
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ana->LP_FL_CTRL_3V &= ~ANAC_FL_SLEEP_CNT_EN_Msk;
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ana->LP_FL_CTRL_3V &= ~ANAC_FL_RC32K_EN_Msk_3v;
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}
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#ifdef SYNC_3V_REG_MANUALLY
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CLK_Wait3vSyncReady();
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#endif
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SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk;
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if(enterCyclically)
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SCB->SCR |= SCB_SCR_SLEEPONEXIT_Msk;
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else
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SCB->SCR &= ~SCB_SCR_SLEEPONEXIT_Msk;
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__WFI();
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#ifdef SYNC_3V_REG_MANUALLY
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CLK_Wait3vSyncReady();
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#endif
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}
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void LP_SetDeepSleepConfig(ANA_T *ana,
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uint32_t wkMode,
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bool enterCyclically,
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uint8_t PowerCtrl,
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uint8_t dp_mode)
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{
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LP_EnableInt(ana,ENABLE);
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if (dp_mode == LP_DEEPSLEEP_MODE1){
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ana->LP_LP_LDO_3V |= ANAC_LPLDO_H_EN_Msk_3v;
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ana->LP_LP_LDO_3V |= ANAC_LPLDO_L_EN_Msk;
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ana->LP_FL_CTRL_3V |= ANAC_LDO_POWER_CTL_Msk | ANAC_FL_LDO_ISOLATE_EN_Msk;
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ana->LP_FL_CTRL_3V &= ~ANAC_LDOL_POWER_CTL_Msk;
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} else if (dp_mode == LP_DEEPSLEEP_MODE2){
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ana->LP_LP_LDO_3V |= ANAC_LPLDO_H_EN_Msk_3v;
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ana->LP_LP_LDO_3V &= ~ANAC_LPLDO_L_EN_Msk;
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ana->LP_FL_CTRL_3V |= ANAC_LDOL_POWER_CTL_Msk | ANAC_LDO_POWER_CTL_Msk;
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ana->LP_FL_CTRL_3V &= ~ANAC_FL_LDO_ISOLATE_EN_Msk;
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} else if (dp_mode == LP_DEEPSLEEP_MODE3){
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ana->LP_LP_LDO_3V &= ~ANAC_LPLDO_H_EN_Msk_3v;
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ana->LP_LP_LDO_3V |= ANAC_LPLDO_L_EN_Msk;
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ana->LP_FL_CTRL_3V |= ANAC_LDOL_POWER_CTL_Msk | ANAC_LDO_POWER_CTL_Msk;
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ana->LP_FL_CTRL_3V &= ~ANAC_FL_LDO_ISOLATE_EN_Msk;
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}
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// Enable flash power in lp mode (Also need to enable flash AutoDp to save power)
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// ana->LP_FL_CTRL_3V |= ANAC_FL_FLASH_BP_EN_Msk;
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LP_SetSleepMode(ana, LP_MODE_SEL_DEEPSLEEP_MODE);
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if((LP_WKUP_MODE_SEL_EXT_GPIO != wkMode)&&(LP_WKUP_MODE_SEL_GPIO != wkMode)){
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if (CLK->CLK_TOP_CTRL_3V & CLK_TOPCTL_32K_CLK_SEL_Msk_3v) {
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ana->LP_FL_CTRL_3V |= ANAC_FL_XTAL32K_EN_Msk_3v;
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ana->LP_FL_CTRL_3V &= ~ANAC_FL_RC32K_EN_Msk_3v;
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} else {
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ana->LP_FL_CTRL_3V &= ~ANAC_FL_XTAL32K_EN_Msk_3v;
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ana->LP_FL_CTRL_3V |= ANAC_FL_RC32K_EN_Msk_3v;
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}
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ana->LP_INT_CTRL |= ANAC_INT_SLEEP_TMR_WK_EN_Msk;
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} else {
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ana->LP_FL_CTRL_3V &= ~ANAC_FL_RC32K_EN_Msk_3v;
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}
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ana->LP_FL_CTRL_3V = ((PowerCtrl & 0x1f) << 24u) | (ana->LP_FL_CTRL_3V & 0xe0FFFFFF);
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// Wait 3v sync ready manually
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ANA->LP_REG_SYNC |= ANAC_LP_REG_SYNC_3V_Msk | ANAC_LP_REG_SYNC_3V_TRG_Msk;
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while(ANA->LP_REG_SYNC & (ANAC_LP_REG_SYNC_3V_TRG_Msk)) {}
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SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
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if(enterCyclically)
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SCB->SCR |= SCB_SCR_SLEEPONEXIT_Msk;
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else
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SCB->SCR &= ~SCB_SCR_SLEEPONEXIT_Msk;
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ANA->LP_INT_CTRL |= ANAC_INT_SLEEP_TMR_INT_EN_Msk;
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__WFI();
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}
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void LP_SetStandbyMode0Config(void)
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{
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LP_SetSleepMode(ANA, LP_MODE_SEL_STANDBY_M0_MODE);
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LP_EnableInt(ANA,ENABLE);
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ANA->LP_FL_CTRL_3V &= ~ANAC_FL_XTAL32K_EN_Msk_3v;
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ANA->LP_FL_CTRL_3V &= ~ANAC_FL_RC32K_EN_Msk_3v;
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#ifdef SYNC_3V_REG_MANUALLY
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CLK_Wait3vSyncReady();
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#endif
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SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
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__WFI();
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}
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void LP_SetStandbyMode0BodLvrConfig(void)
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{
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LP_SetSleepMode(ANA, LP_MODE_SEL_STANDBY_M0_MODE);
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LP_EnableInt(ANA,ENABLE);
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//bod/lvr wakeup need
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ANA->LP_FL_CTRL_3V |= ANAC_FL_XTAL32K_EN_Msk_3v;
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ANA->LP_FL_CTRL_3V |= ANAC_FL_RC32K_EN_Msk_3v;
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#ifdef SYNC_3V_REG_MANUALLY
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CLK_Wait3vSyncReady();
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#endif
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SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
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__WFI();
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}
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void LP_SetStandbyMode1Config(ANA_T *ana,
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uint32_t wkMode,
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uint8_t PowerCtrl,
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uint32_t slpTimer,
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uint8_t spaceIdx,
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uint8_t stdy_mode)
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{
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LP_SetSleepMode(ana, LP_MODE_SEL_STANDBY_M1_MODE);
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LP_EnableInt(ana,ENABLE);
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if (stdy_mode == LP_STANDBY_M1_MODE1){
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ana->LP_LP_LDO_3V |= ANAC_LPLDO_H_EN_Msk_3v;
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ana->LP_LP_LDO_3V |= ANAC_LPLDO_L_EN_Msk;
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ana->LP_FL_CTRL_3V |= ANAC_FL_LDO_ISOLATE_EN_Msk;
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ana->LP_FL_CTRL_3V &= ~(ANAC_LDOL_POWER_CTL_Msk | ANAC_LDO_POWER_CTL_Msk);
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} else if (stdy_mode == LP_STANDBY_M1_MODE2){
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ana->LP_LP_LDO_3V |= ANAC_LPLDO_H_EN_Msk_3v;
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ana->LP_LP_LDO_3V &= ~ANAC_LPLDO_L_EN_Msk;
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ana->LP_FL_CTRL_3V |= ANAC_LDOL_POWER_CTL_Msk | ANAC_FL_LDO_ISOLATE_EN_Msk;
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ana->LP_FL_CTRL_3V &= ~(ANAC_LDO_POWER_CTL_Msk);
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} else if (stdy_mode == LP_STANDBY_M1_MODE3){
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ana->LP_LP_LDO_3V &= ~ANAC_LPLDO_H_EN_Msk_3v;
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ana->LP_LP_LDO_3V |= ANAC_LPLDO_L_EN_Msk;
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ana->LP_FL_CTRL_3V |= ANAC_LDOL_POWER_CTL_Msk | ANAC_FL_LDO_ISOLATE_EN_Msk;
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ana->LP_FL_CTRL_3V &= ~(ANAC_LDO_POWER_CTL_Msk);
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}
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ana->LP_FL_CTRL_3V = ((PowerCtrl & 0x1f) << 24u) | (ana->LP_FL_CTRL_3V & 0xe0FFFFFF);
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if((LP_WKUP_MODE_SEL_EXT_GPIO != wkMode)&&(LP_WKUP_MODE_SEL_GPIO != wkMode)){
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if (CLK->CLK_TOP_CTRL_3V & CLK_TOPCTL_32K_CLK_SEL_Msk_3v) {
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ana->LP_FL_CTRL_3V |= ANAC_FL_XTAL32K_EN_Msk_3v;
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ana->LP_FL_CTRL_3V &= ~ANAC_FL_RC32K_EN_Msk_3v;
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} else {
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ana->LP_FL_CTRL_3V &= ~ANAC_FL_XTAL32K_EN_Msk_3v;
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ana->LP_FL_CTRL_3V |= ANAC_FL_RC32K_EN_Msk_3v;
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}
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ana->LP_INT_CTRL |= ANAC_INT_SLEEP_TMR_WK_EN_Msk;
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} else {
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ana->LP_FL_CTRL_3V &= ~ANAC_FL_RC32K_EN_Msk_3v;
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ana->LP_FL_CTRL_3V &= ~ANAC_FL_XTAL32K_EN_Msk_3v;
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}
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// Wait 3v sync ready manually
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ANA->LP_REG_SYNC |= ANAC_LP_REG_SYNC_3V_Msk | ANAC_LP_REG_SYNC_3V_TRG_Msk;
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while(ANA->LP_REG_SYNC & (ANAC_LP_REG_SYNC_3V_TRG_Msk)) {}
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if((LP_WKUP_MODE_SEL_EXT_GPIO != wkMode)&&(LP_WKUP_MODE_SEL_GPIO != wkMode)){
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LP_SetSleepTime(ana,slpTimer,spaceIdx);
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}
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SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
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__WFI();
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}
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