#include "soc_api.h"
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#include "utility.h"
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#include "app_log.h"
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#include "prf_ota.h"
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#include "PANSeries.h"
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#include "comm_prf.h"
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#include "flash_manager.h"
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#include "info.h"
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#define PKT_MASK_TBL_LEN (128 * 4)
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#define PRF_OTA_PKT_LEN 250
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#define PRF_BIT_MASK_WIDTH 32
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pan_prf_config_t prf_config =
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{
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.work_mode = PRF_MODE_ENHANCE, //PRF_MODE_NORMAL,PRF_MODE_ENHANCE
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.chip_mode = PRF_CHIP_MODE_SEL_NRF, //PRF_CHIP_MODE_SEL_NRF,//PRF_CHIP_MODE_SEL_XN297,
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.trx_mode = PRF_RX_MODE,
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.phy = PRF_PHY_2M, //PRF_PHY_250K,//PRF_PHY_1M,
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.crc = PRF_CRC_SEL_CRC16,
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.src = PRF_SRC_SEL_NOSRC,
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.mode_conf = PRF_BLE_CONF,
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.rx_timeout = 50000, //50ms
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.rf_channel = 2510,
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.tx_no_ack = DISABLE,
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.trf_type = PRF_TRF_NRF52,
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.rx_length = 5,
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.sync_length = 4,
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.crc_include_sync = DISABLE,
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.src_include_sync = DISABLE,
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.sync = { 0x71, 0x76, 0x41, 0x29 },
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.pid_manual_flag = DISABLE,
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.tx_power = 0,
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.pipe = PRF_PIPE0,
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};
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enum prf_ota_status_t
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{
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prf_ota_verify = 0x01,
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prf_ota_start,
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prf_ota_ing,
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prf_ota_check,
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prf_ota_check_ack,
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prf_ota_retrans,
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prf_ota_get_checksum,
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prf_ota_end,
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};
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bool rx_data_exist = false;
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bool prf_verify_timeout = true;
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bool prf_check_status = false;
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enum prf_ota_status_t prf_ota_stat = prf_ota_verify;
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panchip_prf_payload_t rx_payload;
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uint16_t chunk_pk_index;
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uint16_t pkt_sector_num;
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uint16_t pkt_tbl_num;
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uint16_t pkt_total_num;
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uint8_t chunk_pk_tbl[PKT_MASK_TBL_LEN];
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uint32_t calculate_chunk_len;
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volatile uint8_t calculate_sum;
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uint8_t firmware_data[PRF_OTA_PKT_LEN * PRF_BIT_MASK_WIDTH];
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uint32_t firmware_len;
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uint8_t prf_id;
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uint8_t prf_pkt_len;
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uint8_t prf_mask_width;
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const uint8_t prf_verify_data[3] = {0x4F, 0x54, 0x41};
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void data_printf(uint8_t const *data, uint32_t len)
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{
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uint32_t i = 0;
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if (len == 0)
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{
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return;
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}
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for (; i < len; i++)
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{
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APP_LOG("0x%02X ", data[i]);
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}
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APP_LOG("\n");
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}
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void event_tx_fun(void)
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{
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panchip_prf_trx_start();
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}
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__ramfunc void event_rx_fun(void)
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{
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rx_payload.data_length = panchip_prf_data_rec(&rx_payload);
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panchip_prf_payload_t ack_payload;
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static uint8_t ack_count = 0;
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if((rx_payload.data[0] == prf_ota_verify) || (rx_payload.data[0] == prf_ota_check))
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{
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if(ack_count != (prf_id%10))
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{
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panchip_prf_reset();
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panchip_prf_trx_start();
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}
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ack_count++;
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if(ack_count >= 10)
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{
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ack_count = 0;
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}
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}
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else
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{
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ack_count = 0;
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}
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if(rx_payload.data[0] == prf_ota_verify)
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{
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memcpy(&ack_payload.data, &rx_payload.data, rx_payload.data_length);
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ack_payload.data[4] = prf_id;
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ack_payload.data_length = rx_payload.data_length + 1;
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}
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else if(rx_payload.data[0] == prf_ota_check)
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{
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ack_payload.data[0] = prf_ota_check_ack;
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memcpy(&ack_payload.data[1],chunk_pk_tbl, pkt_tbl_num);
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ack_payload.data_length = (pkt_tbl_num + 1);
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}
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else if(rx_payload.data[0] == prf_ota_get_checksum)
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{
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ack_payload.data[0] = prf_ota_get_checksum;
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ack_payload.data[1] = prf_id;
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ack_payload.data[2] = calculate_sum;
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ack_payload.data_length = 3;
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}
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else
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{
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ack_payload.data_length = 0;
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}
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panchip_prf_set_ack_data(&ack_payload);
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rx_data_exist = true;
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}
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void event_rx_timeout_fun(void)
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{
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prf_verify_timeout = false;
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}
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void event_crc_err_fun(void)
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{
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panchip_prf_trx_start();
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}
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void panchip_prf_isr_init(void)
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{
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isr_cb.tx_cb = event_tx_fun;
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isr_cb.rx_cb = event_rx_fun;
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isr_cb.rx_timeout_cb = event_rx_timeout_fun;
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isr_cb.rx_crc_err_cb = event_crc_err_fun;
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}
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void panchip_prf_irq_enable(void)
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{
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NVIC_SetPriority(LL_IRQn, 0);
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/* Enable RF interrupt */
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NVIC_EnableIRQ(LL_IRQn);
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}
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uint8_t prf_ota_check_sum(uint8_t *data, uint32_t len)
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{
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uint8_t check_sum = 0;
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for(int i = 0;i < len;i++)
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{
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check_sum += data[i];
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}
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return check_sum;
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}
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uint8_t prf_pkt_len_get(void)
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{
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if(prf_pkt_len == 0) {
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return 250;
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} else {
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return prf_pkt_len;
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}
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}
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uint8_t prf_mask_width_get(void)
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{
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if(prf_mask_width == 0) {
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return 32;
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} else {
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return prf_mask_width;
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}
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}
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void panchip_prf_ota_init(void)
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{
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if(check_info_tlv_data_prf()) {
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phy_value_init_from_info_prf();
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} else {
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phy_value_init_from_code_prf();
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}
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memset(firmware_data, 0xff, PRF_OTA_PKT_LEN * PRF_BIT_MASK_WIDTH);
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memset(chunk_pk_tbl, 0, sizeof(chunk_pk_tbl));
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panchip_prf_init(&prf_config);
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// Generate a PRF ID from chip mac address
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extern uint8_t m_chip_mac[6];
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srand(BytesToUint32(&m_chip_mac[2]));
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prf_id = (uint8_t)rand();
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panchip_prf_set_chn(prf_config.rf_channel);
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/*adr match bit */
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PRI_RF_SetAddrMatchBit(PRI_RF, 0);
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panchip_prf_trx_start();
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}
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void panchip_prf_recv_data_prase(uint8_t *data, uint8_t len)
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{
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switch(data[0])
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{
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case prf_ota_verify:
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if(!memcmp(&data[1], prf_verify_data, 3))
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{
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firmware_len = 0;
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calculate_sum = 0;
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fm_status_refresh(); /* clear flash manager for a new ota process */
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prf_ota_stat = prf_ota_start;
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panchip_prf_rx_timeout(0);
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panchip_prf_trx_start();
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}
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break;
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case prf_ota_start:
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if(prf_ota_stat == prf_ota_start)
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{
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prf_ota_stat = prf_ota_ing;
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pkt_sector_num = data[1];
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prf_pkt_len = data[2];
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prf_mask_width = data[3];
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FMC_EraseCodeArea(FLCTL, FLASH_AREA_IMAGE_START, pkt_sector_num * SECTOR_SIZE);
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pkt_total_num = (pkt_sector_num * SECTOR_SIZE) / PRF_OTA_PKT_LEN;
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if((pkt_sector_num * SECTOR_SIZE) % PRF_OTA_PKT_LEN) {
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pkt_total_num = pkt_total_num + 1;
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}
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pkt_tbl_num = (pkt_sector_num * SECTOR_SIZE) / (PRF_OTA_PKT_LEN * 8);
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if((pkt_sector_num * SECTOR_SIZE) % (PRF_OTA_PKT_LEN * 8)) {
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pkt_tbl_num = pkt_tbl_num + 1;
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}
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APP_LOG_INFO("pkt_tbl_num %d,%d,%d\n",pkt_sector_num, pkt_tbl_num, pkt_total_num);
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}
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break;
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case prf_ota_ing:
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if(prf_ota_stat == prf_ota_ing)
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{
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chunk_pk_index = (data[1] << 8) | data[2];
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chunk_pk_tbl[(chunk_pk_index/8)] |= 1 << (chunk_pk_index - 8 * (chunk_pk_index/8));
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memcpy(&firmware_data[(len - 3) * (chunk_pk_index%PRF_BIT_MASK_WIDTH)], &data[3], (len - 3));
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calculate_chunk_len += (len - 3);
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APP_LOG_INFO("chunk_pk_index %d,%x,%d\n",chunk_pk_index,chunk_pk_tbl[(chunk_pk_index/8)],calculate_chunk_len);
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if((!((chunk_pk_index + 1) % PRF_BIT_MASK_WIDTH)) ||
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(((chunk_pk_index + 1) % PRF_BIT_MASK_WIDTH) && ((chunk_pk_index + 1) == pkt_total_num)))
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{
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FMC_WriteStream(FLCTL, FLASH_AREA_IMAGE_START + firmware_len, firmware_data, PRF_OTA_PKT_LEN * PRF_BIT_MASK_WIDTH);
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memset(firmware_data, 0xff, PRF_OTA_PKT_LEN * PRF_BIT_MASK_WIDTH);
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firmware_len += PRF_OTA_PKT_LEN * PRF_BIT_MASK_WIDTH;
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APP_LOG_INFO("len %d,%d\n",firmware_len, calculate_chunk_len);
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calculate_chunk_len = 0;
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}
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}
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break;
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case prf_ota_check:
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for(int i = 0;i < pkt_tbl_num;i++)
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{
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if(((chunk_pk_tbl[i] & 0xff) != 0xff))
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{
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prf_check_status = false;
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break;
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}
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else
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{
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prf_check_status = true;
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}
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}
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if(prf_check_status == false)
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{
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prf_ota_stat = prf_ota_retrans;
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}
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break;
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case prf_ota_retrans:
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if(prf_ota_stat == prf_ota_retrans)
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{
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chunk_pk_index = (data[1] << 8) | data[2];
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chunk_pk_tbl[(chunk_pk_index/8)] |= 1 << (chunk_pk_index - 8 * (chunk_pk_index/8));
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APP_LOG_INFO("trans %d,%d\n",chunk_pk_index,(len - 3));
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FMC_WriteStream(FLCTL, FLASH_AREA_IMAGE_START + chunk_pk_index * PRF_OTA_PKT_LEN, &data[3], (len - 3));
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}
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break;
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case prf_ota_get_checksum:
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if(calculate_sum == 0)
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{
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uint16_t read_index = 0;
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uint8_t m_checksum = 0;
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while(read_index < pkt_sector_num)
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{
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FMC_ReadStream(FLCTL,(FLASH_AREA_IMAGE_START + (read_index * SECTOR_SIZE)), CMD_DREAD, firmware_data, SECTOR_SIZE);
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m_checksum += prf_ota_check_sum(firmware_data, SECTOR_SIZE);
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read_index++;
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}
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calculate_sum = m_checksum;
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APP_LOG_INFO("calculate_sum %x\n",calculate_sum);
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}
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break;
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case prf_ota_end:
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SYS_UnlockReg();
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CLK_ResetChip();
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break;
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default:
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break;
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}
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}
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bool panchip_prf_ota_start(void)
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{
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panchip_prf_ota_init();
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while(prf_ota_stat == prf_ota_verify)
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{
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if(rx_data_exist == true)
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{
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rx_data_exist = false;
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panchip_prf_recv_data_prase(rx_payload.data, rx_payload.data_length);
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}
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if(prf_verify_timeout == false)
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{
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return false;
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}
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}
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return true;
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}
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void on_prf_ota_enter(void)
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{
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APP_LOG_INFO("Entering Private 2.4G (PRF) OTA flow, OTA Server Init..\n");
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while(prf_ota_stat != prf_ota_end)
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{
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if(rx_data_exist == true)
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{
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rx_data_exist = false;
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panchip_prf_recv_data_prase(rx_payload.data, rx_payload.data_length);
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}
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}
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}
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