/*
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* Copyright (c) 2019-2023 Beijing Hanwei Innovation Technology Ltd. Co. and
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* its subsidiaries and affiliates (collectly called MKSEMI).
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*
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form, except as embedded into an MKSEMI
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* integrated circuit in a product or a software update for such product,
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* must reproduce the above copyright notice, this list of conditions and
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* the following disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* 3. Neither the name of MKSEMI nor the names of its contributors may be used
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* to endorse or promote products derived from this software without
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* specific prior written permission.
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*
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* 4. This software, with or without modification, must only be used with a
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* MKSEMI integrated circuit.
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*
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* 5. Any software provided in binary form under this license must not be
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* reverse engineered, decompiled, modified and/or disassembled.
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*
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* THIS SOFTWARE IS PROVIDED BY MKSEMI "AS IS" AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL MKSEMI OR CONTRIBUTORS BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "mk_dual_timer.h"
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#include "mk_clock.h"
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#include "mk_reset.h"
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#include "mk_trace.h"
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static struct DUAL_TIMER_HANDLE_T dual_timer_handle[DUAL_TIMER_MAX_NUM] = {
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{
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.base = TIMER2,
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.irq = TIMER2_IRQn,
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},
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{
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.base = TIMER3,
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.irq = TIMER3_IRQn,
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},
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};
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int dual_timer_open(enum DUAL_TIMER_DEV_T id, struct DUAL_TIMER_CFG_T *config)
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{
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if ((id >= DUAL_TIMER_MAX_NUM) || (config == NULL))
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{
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return DRV_ERROR;
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}
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else if (id == DUAL_TIMER_ID0)
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{
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// enable TIMER2 clock
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clock_enable(CLOCK_TIMER2);
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}
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else if (id == DUAL_TIMER_ID1)
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{
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// enable TIMER3 clock
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clock_enable(CLOCK_TIMER3);
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}
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ASSERT((config->width == 0 && config->load < 0x10000) || (config->width == 1), "config is invalid");
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// clear int status
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dual_timer_handle[id].base->INTR_CLR = 0;
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// config
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uint32_t val = DTIMER_CTRL_SIZE(config->width) | DTIMER_CTRL_PRESCALE(config->prescale) | DTIMER_CTRL_INT_EN(config->int_en);
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if (config->type == DUAL_TIMER_TYPE_ONESHOT)
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{
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val |= DTIMER_CTRL_ONE_SHOT_MSK;
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}
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else if (config->type == DUAL_TIMER_TYPE_PERIODIC)
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{
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val |= DTIMER_CTRL_MODE_MSK;
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}
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dual_timer_handle[id].base->CTRL = val;
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// load
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dual_timer_handle[id].base->LOAD = config->load;
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dual_timer_handle[id].int_en = config->int_en;
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dual_timer_handle[id].callback = config->callback;
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#if (TIMER2_INT_MODE_EN || TIMER3_INT_MODE_EN)
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NVIC_SetPriority(dual_timer_handle[id].irq, IRQ_PRIORITY_NORMAL);
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NVIC_ClearPendingIRQ(dual_timer_handle[id].irq);
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NVIC_EnableIRQ(dual_timer_handle[id].irq);
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#endif
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return DRV_OK;
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}
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int dual_timer_close(enum DUAL_TIMER_DEV_T id)
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{
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if (id >= DUAL_TIMER_MAX_NUM)
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{
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return DRV_ERROR;
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}
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// disable
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dual_timer_handle[id].base->CTRL &= ~DTIMER_CTRL_EN_MSK;
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#if (TIMER2_INT_MODE_EN || TIMER3_INT_MODE_EN)
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NVIC_DisableIRQ(dual_timer_handle[id].irq);
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NVIC_ClearPendingIRQ(dual_timer_handle[id].irq);
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#endif
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if (id == DUAL_TIMER_ID0)
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{
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// disable TIMER2 clock
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clock_disable(CLOCK_TIMER2);
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}
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else if (id == DUAL_TIMER_ID1)
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{
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// disable TIMER3 clock
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clock_disable(CLOCK_TIMER3);
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}
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return DRV_OK;
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}
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void dual_timer_start(enum DUAL_TIMER_DEV_T id, uint32_t start)
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{
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dual_timer_handle[id].base->LOAD = start;
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// enable
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dual_timer_handle[id].base->CTRL |= DTIMER_CTRL_EN_MSK;
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}
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void dual_timer_stop(enum DUAL_TIMER_DEV_T id)
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{
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// disable
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dual_timer_handle[id].base->CTRL &= ~DTIMER_CTRL_EN_MSK;
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}
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void dual_timer_reset(void)
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{
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reset_module(RESET_MODULE_DUAL_TIMER);
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}
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// update periodic counter value
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void dual_timer_set(enum DUAL_TIMER_DEV_T id, uint32_t count)
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{
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// load
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dual_timer_handle[id].base->BG_LOAD = count;
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}
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uint32_t dual_timer_get(enum DUAL_TIMER_DEV_T id)
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{
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return dual_timer_handle[id].base->VALUE;
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}
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// Dual-Timer work at one shot mode, usually disable interrupt
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void dual_timer_delay(enum DUAL_TIMER_DEV_T id, uint32_t count)
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{
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// clear int status
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dual_timer_handle[id].base->INTR_CLR = 0;
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// load
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dual_timer_handle[id].base->LOAD = count;
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while ((dual_timer_handle[id].base->STATUS & DTIMER_STATUS_MSK) == 0)
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{
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}
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}
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void TIMER2_IRQHandler(void)
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{
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#if TIMER2_INT_MODE_EN
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enum DUAL_TIMER_DEV_T id = DUAL_TIMER_ID0;
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// clear
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dual_timer_handle[id].base->INTR_CLR = 0;
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if (dual_timer_handle[id].callback)
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{
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dual_timer_handle[id].callback(&id, dual_timer_handle[id].base->LOAD);
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}
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#endif
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}
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void TIMER3_IRQHandler(void)
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{
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#if TIMER3_INT_MODE_EN
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enum DUAL_TIMER_DEV_T id = DUAL_TIMER_ID1;
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// clear
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dual_timer_handle[id].base->INTR_CLR = 0;
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if (dual_timer_handle[id].callback)
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{
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dual_timer_handle[id].callback(&id, dual_timer_handle[id].base->LOAD);
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}
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#endif
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}
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