/*
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* Copyright (c) 2019-2023 Beijing Hanwei Innovation Technology Ltd. Co. and
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* its subsidiaries and affiliates (collectly called MKSEMI).
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*
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form, except as embedded into an MKSEMI
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* integrated circuit in a product or a software update for such product,
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* must reproduce the above copyright notice, this list of conditions and
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* the following disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* 3. Neither the name of MKSEMI nor the names of its contributors may be used
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* to endorse or promote products derived from this software without
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* specific prior written permission.
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*
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* 4. This software, with or without modification, must only be used with a
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* MKSEMI integrated circuit.
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*
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* 5. Any software provided in binary form under this license must not be
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* reverse engineered, decompiled, modified and/or disassembled.
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*
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* THIS SOFTWARE IS PROVIDED BY MKSEMI "AS IS" AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL MKSEMI OR CONTRIBUTORS BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef MK_CLOCK_H_
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#define MK_CLOCK_H_
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#include "mk_common.h"
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/**
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* @addtogroup MK8000_Clock
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* @{
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*/
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/**
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* @brief Enable or disable the peripheral clock enumeration
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*/
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enum CLOCK_GATE_T
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{
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CLOCK_GPIO = 1,
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CLOCK_SPI0 = 2,
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CLOCK_SPI1 = 3,
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CLOCK_LSP = 4,
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CLOCK_DMA = 5,
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CLOCK_MAC = 6,
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CLOCK_UART0 = 8,
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CLOCK_UART1 = 9,
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CLOCK_I2C = 10,
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CLOCK_EFUSE = 11,
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CLOCK_TIMER0 = 12,
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CLOCK_TIMER1 = 13,
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CLOCK_TIMER2 = 14,
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CLOCK_TIMER3 = 15,
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CLOCK_WDT = 16,
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CLOCK_RTC = 17,
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CLOCK_PWM = 18,
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CLOCK_ADC = 19,
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CLOCK_TRNG = 20,
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CLOCK_FLASH_CTRL = 21,
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CLOCK_AES = 22,
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CLOCK_CALIB = 23,
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CLOCK_RX = 24,
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CLOCK_TX = 25,
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CLOCK_PHY_TIMER = 27,
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};
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#define CLOCK_RCO_32K 32768 /*!< Internal Oscillator, 32.768kHz RC oscillator */
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#define CLOCK_RO_48M 48000000 /*!< Internal Oscillator, 48MHz RC oscillator */
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#define CLOCK_XTAL_32K 32768 /*!< External Oscillator, 32.768kHz crystal oscillator */
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#define CLOCK_XTAL38P4M 62400000 /*!< External Oscillator, 62.4MHz = (38.4MHz * 13) / 8 */
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/**
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* @brief Clock name enumeration.
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* @note This enumeration used to get clock frequency
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*/
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enum CLOCK_TYPE_T
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{
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CLOCK_SYS_CLK,
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CLOCK_AHB_CLK,
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CLOCK_APB_CLK,
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CLOCK_WDT_CLK,
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CLOCK_32K_CLK,
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CLOCK_FLASH_CLK,
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};
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#define CLOCK_32K_CLK_SEL 0 /*!< 32K CLK to configure */
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#define CLOCK_SYS_CLK_SEL 1 /*!< SYS CLK to configure */
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#define CLOCK_WDT_CLK_SEL 2 /*!< WDT CLK to configure */
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/**
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* @brief Clock source selection enumeration.
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*
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*/
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enum CLOCK_ATTACH_TYPE_T
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{
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CLOCK_RCO32K_TO_32K_CLK = MUX(CLOCK_32K_CLK_SEL, 0), /*!< RCO32k selected as 32k clock */
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CLOCK_XTAL32K_TO_32K_CLK = MUX(CLOCK_32K_CLK_SEL, 1), /*!< XTAL32.768k selected as 32K clock */
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CLOCK_EXT32K_SINE_TO_32K_CLK = MUX(CLOCK_32K_CLK_SEL, 2), /*!< External injection 32k sine wave selected as 32K clock */
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CLOCK_EXT32K_SQUARE_TO_32K_CLK = MUX(CLOCK_32K_CLK_SEL, 3), /*!< External injection 32k square wave selected as 32K clock */
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CLOCK_32K_TO_SYS_CLK = MUX(CLOCK_SYS_CLK_SEL, 0), /*!< 32k clk selected as system clock */
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CLOCK_48M_RO_TO_SYS_CLK = MUX(CLOCK_SYS_CLK_SEL, 1), /*!< 48M clk selected as system clock */
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CLOCK_62P4M_XTAL38P4M_TO_SYS_CLK = MUX(CLOCK_SYS_CLK_SEL, 2), /*!< 62.4M clk (XTAL 38.4M) selected as system clock */
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CLOCK_62P4M_EXT38P4M_SINE_TO_SYS_CLK = MUX(CLOCK_SYS_CLK_SEL, 3), /*!< 62.4M clk (external 38.4M sine wave) selected as system clock */
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CLOCK_62P4M_EXT38P4M_SQUARE_TO_SYS_CLK = MUX(CLOCK_SYS_CLK_SEL, 4), /*!< 62.4M clk (external 38.4M square wave) selected as system clock */
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CLOCK_32K_TO_WDT_CLK = MUX(CLOCK_WDT_CLK_SEL, 0), /*!< 32k clk selected as watchdog clock */
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CLOCK_APB_TO_WDT_CLK = MUX(CLOCK_WDT_CLK_SEL, 1), /*!< APB divider clock selected as watchdog clock */
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};
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/**
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* @brief Divider value for AHB and APB divider.
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*
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*/
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enum CLOCK_BUS_DIVIDER_VAL_T
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{
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CLOCK_DIVIDED_BY_1 = 0, /*!< Clock divided by 1 */
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CLOCK_DIVIDED_BY_2 = 1, /*!< Clock divided by 2 */
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CLOCK_DIVIDED_BY_4 = 2, /*!< Clock divided by 4 */
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CLOCK_DIVIDED_BY_8 = 3, /*!< Clock divided by 8 */
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};
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/**
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* @brief Frequency divided objects enumeration.
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*/
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enum CLOCK_DIVIDER_T
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{
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CLOCK_AHB_DIV, /*!< AHB clock is divided by (1/2/4/8) */
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CLOCK_APB_DIV, /*!< APB clock is divided by (1/2/4/8) */
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CLOCK_FLASH_CTRL_DIV, /*!< Flash controller clock divided by (1/2/4/8) */
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CLOCK_UART1_FDIV, /*!< UART1 function clock fractional ms/ns divider */
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CLOCK_UART0_FDIV, /*!< UART1 function clock fractional ms/ns divider */
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};
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/**
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* @brief XTAL injection type.
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*/
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enum CLOCK_XTAL_INJECTION_TYPE_T
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{
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CLOCK_XTAL_INJECTION_SQUARE = 1, /*!< External input square wave */
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CLOCK_XTAL_INJECTION_SINE = 2, /*!< External input sine wave */
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};
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief Enable the peripheral clock
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*
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* @param[in] clk Peripheral type @ref CLOCK_GATE_T
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*/
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void clock_enable(enum CLOCK_GATE_T clk);
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/**
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* @brief Disable the peripheral clock
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*
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* @param[in] clk Peripheral type @ref CLOCK_GATE_T
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*/
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void clock_disable(enum CLOCK_GATE_T clk);
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/**
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* @brief Function for setting the selected clock source.
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*
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* @param[in] connection Clock source selection @ref CLOCK_ATTACH_TYPE_T
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*/
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void clock_attach(enum CLOCK_ATTACH_TYPE_T connection);
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/**
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* @brief Function for dividing current clock
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* @note For details about the UARTx frequency division, see uart_baud_set() function of mk_uart.c.
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* @param[in] div_name Frequency divided objects @ref CLOCK_DIVIDER_T
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* @param[in] div_value Frequency divided value
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*/
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void clock_set_divider(enum CLOCK_DIVIDER_T div_name, uint8_t div_value);
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/**
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* @brief Function for getting clock frequency.
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*
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* @param[in] clk_name Clock type @ref CLOCK_TYPE_T
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* @return Frequency value
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*/
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uint32_t clock_get_frequency(enum CLOCK_TYPE_T clk_name);
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/**
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* @brief Set XTAL 38.4MHz clock injection type.
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*
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* @param[in] type XTAL injection type @ref CLOCK_TYPE_T
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*/
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void clock_xtal38m4_injection_set(enum CLOCK_XTAL_INJECTION_TYPE_T type);
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/**
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* @brief Set XTAL 32KHz clock injection type.
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*
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* @param[in] type XTAL injection type @ref CLOCK_TYPE_T
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*/
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void clock_xtal32k_injection_set(enum CLOCK_XTAL_INJECTION_TYPE_T type);
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#ifdef __cplusplus
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}
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#endif
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/**
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* @}
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*/
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#endif /* MK_CLOCK_H_ */
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