/******************************************************************************
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* @file gcc_arm.ld
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* @brief GNU Linker Script for Cortex-M based device
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* @version V2.0.0
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* @date 21. May 2019
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******************************************************************************/
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/*
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* Copyright (c) 2009-2019 Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the License); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an AS IS BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/*
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*-------- <<< Use Configuration Wizard in Context Menu >>> -------------------
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*/
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/*---------------------- Flash Configuration ----------------------------------
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<h> Flash Configuration
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<o0> Flash Base Address <0x0-0xFFFFFFFF:8>
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<o1> Flash Size (in Bytes) <0x0-0xFFFFFFFF:8>
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</h>
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-----------------------------------------------------------------------------*/
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__ROM_BASE = 0x00000000;
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__ROM_SIZE = 0x00040000;
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/*--------------------- Embedded RAM Configuration ----------------------------
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<h> RAM Configuration
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<o0> RAM Base Address <0x0-0xFFFFFFFF:8>
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<o1> RAM Size (in Bytes) <0x0-0xFFFFFFFF:8>
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</h>
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-----------------------------------------------------------------------------*/
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__RAM_BASE = (0x02000000);
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__RAM_SIZE = (0x00010000);
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/*--------------------- Stack / Heap Configuration ----------------------------
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<h> Stack / Heap Configuration
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<o0> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
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<o1> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
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</h>
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-----------------------------------------------------------------------------*/
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__STACK_SIZE = 0x00003800;
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__HEAP_SIZE = 0x00000000;
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/*
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*-------------------- <<< end of configuration section >>> -------------------
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*/
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MEMORY
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{
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FLASH (rx) : ORIGIN = __ROM_BASE, LENGTH = __ROM_SIZE
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RAM (rwx) : ORIGIN = __RAM_BASE, LENGTH = __RAM_SIZE
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}
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/* Linker script to place sections and symbol values. Should be used together
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* with other linker script that defines memory regions FLASH and RAM.
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* It references following symbols, which must be defined in code:
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* Reset_Handler : Entry of reset handler
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*
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* It defines following symbols, which code can use without definition:
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* __exidx_start
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* __exidx_end
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* __copy_table_start__
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* __copy_table_end__
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* __zero_table_start__
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* __zero_table_end__
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* __etext
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* __data_start__
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* __preinit_array_start
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* __preinit_array_end
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* __init_array_start
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* __init_array_end
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* __fini_array_start
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* __fini_array_end
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* __data_end__
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* __bss_start__
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* __bss_end__
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* __end__
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* end
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* __HeapLimit
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* __StackLimit
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* __StackTop
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* __stack
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*/
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ENTRY(Reset_Handler)
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SECTIONS
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{
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.text :
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{
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KEEP(*(.vectors))
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*(EXCLUDE_FILE(*mk_mac.o *mk_aes.o *mk_radar.o *MK8000_preamble_FAP_LSP.o *MK8000_read_rssi.o *MK8000_sts_FAP_detect.o *MK8000_sts_chk_valid.o) .test*)
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KEEP(*(.init))
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KEEP(*(.fini))
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/* .ctors */
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*crtbegin.o(.ctors)
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*crtbegin?.o(.ctors)
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*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
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*(SORT(.ctors.*))
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*(.ctors)
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/* .dtors */
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*crtbegin.o(.dtors)
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*crtbegin?.o(.dtors)
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*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
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*(SORT(.dtors.*))
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*(.dtors)
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*(.rodata*)
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KEEP(*(.eh_frame*))
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} > FLASH
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/*
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* SG veneers:
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* All SG veneers are placed in the special output section .gnu.sgstubs. Its start address
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* must be set, either with the command line option '--section-start' or in a linker script,
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* to indicate where to place these veneers in memory.
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*/
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/*
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.gnu.sgstubs :
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{
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. = ALIGN(32);
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} > FLASH
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*/
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.ARM.extab :
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{
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*(.ARM.extab* .gnu.linkonce.armextab.*)
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} > FLASH
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__exidx_start = .;
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.ARM.exidx :
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{
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*(.ARM.exidx* .gnu.linkonce.armexidx.*)
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} > FLASH
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__exidx_end = .;
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.copy.table :
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{
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. = ALIGN(4);
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__copy_table_start__ = .;
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LONG (__etext)
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LONG (__data_start__)
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LONG (__data_end__ - __data_start__)
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/* Add each additional data section here */
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/*
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LONG (__etext2)
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LONG (__data2_start__)
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LONG (__data2_end__ - __data2_start__)
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*/
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__copy_table_end__ = .;
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} > FLASH
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.zero.table :
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{
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. = ALIGN(4);
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__zero_table_start__ = .;
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LONG (__bss_start__)
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LONG (__bss_end__ - __bss_start__)
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/* Add each additional bss section here */
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/*
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LONG (__bss2_start__)
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LONG (__bss2_end__ - __bss2_start__)
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*/
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__zero_table_end__ = .;
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} > FLASH
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/**
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* Location counter can end up 2byte aligned with narrow Thumb code but
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* __etext is assumed by startup code to be the LMA of a section in RAM
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* which must be 4byte aligned
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*/
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__etext = ALIGN (4);
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.data : AT (__etext)
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{
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__data_start__ = .;
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*(vtable)
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*(.data)
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*(.data.*)
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*(.RAMCODE)
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*mk_mac.o(.text*)
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*mk_aes.o(.text*)
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*mk_radar.o(.text*)
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*MK8000_preamble_FAP_LSP.o(.text*)
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*MK8000_read_rssi.o(.text*)
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*MK8000_sts_FAP_detect.o(.text*)
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*MK8000_sts_chk_valid.o(.text*)
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. = ALIGN(4);
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/* preinit data */
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PROVIDE_HIDDEN (__preinit_array_start = .);
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KEEP(*(.preinit_array))
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PROVIDE_HIDDEN (__preinit_array_end = .);
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. = ALIGN(4);
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/* init data */
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PROVIDE_HIDDEN (__init_array_start = .);
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KEEP(*(SORT(.init_array.*)))
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KEEP(*(.init_array))
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PROVIDE_HIDDEN (__init_array_end = .);
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. = ALIGN(4);
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/* finit data */
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PROVIDE_HIDDEN (__fini_array_start = .);
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KEEP(*(SORT(.fini_array.*)))
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KEEP(*(.fini_array))
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PROVIDE_HIDDEN (__fini_array_end = .);
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KEEP(*(.jcr*))
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. = ALIGN(4);
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/* All data end */
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__data_end__ = .;
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} > RAM
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/*
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* Secondary data section, optional
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*
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* Remember to add each additional data section
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* to the .copy.table above to asure proper
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* initialization during startup.
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*/
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/*
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__etext2 = ALIGN (4);
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.data2 : AT (__etext2)
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{
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. = ALIGN(4);
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__data2_start__ = .;
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*(.data2)
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*(.data2.*)
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. = ALIGN(4);
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__data2_end__ = .;
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} > RAM2
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*/
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/* Uninitialized data section
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* This region is not initialized by the C/C++ library and can be used to
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* store state across soft reboots. */
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.noinit (NOLOAD):
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{
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. = ALIGN(4);
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__noinit_start__ = .;
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KEEP(*(.noinit))
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. = ALIGN(4);
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__noinit_end__ = .;
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} > RAM
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.bss :
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{
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. = ALIGN(4);
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__bss_start__ = .;
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*(.bss)
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*(.bss.*)
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*(COMMON)
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. = ALIGN(4);
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__bss_end__ = .;
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} > RAM AT > RAM
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/*
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* Secondary bss section, optional
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*
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* Remember to add each additional bss section
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* to the .zero.table above to asure proper
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* initialization during startup.
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*/
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/*
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.bss2 :
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{
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. = ALIGN(4);
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__bss2_start__ = .;
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*(.bss2)
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*(.bss2.*)
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. = ALIGN(4);
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__bss2_end__ = .;
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} > RAM2 AT > RAM2
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*/
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.heap (NOLOAD) :
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{
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. = ALIGN(8);
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__end__ = .;
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PROVIDE(end = .);
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. = . + __HEAP_SIZE;
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. = ALIGN(8);
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__HeapLimit = .;
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} > RAM
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.stack (ORIGIN(RAM) + LENGTH(RAM) - __STACK_SIZE) (NOLOAD) :
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{
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. = ALIGN(8);
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__StackLimit = .;
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. = . + __STACK_SIZE;
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. = ALIGN(8);
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__StackTop = .;
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} > RAM
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PROVIDE(__stack = __StackTop);
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/* Check if data + heap + stack exceeds RAM limit */
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ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
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__free_ram = __StackLimit - __HeapLimit;
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. = __etext + SIZEOF(.data);
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.ZBOOT_SECTION (.) :
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{
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KEEP(*(.ZBOOT_SECTION))
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} > FLASH
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/* The following section be the last loaded section */
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.ZBUILD_SECTION (.) :
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{
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KEEP(*(.ZBUILD_SECTION))
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} > FLASH
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__flash_end = .;
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}
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