/*
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* Copyright (c) 2019-2023 Beijing Hanwei Innovation Technology Ltd. Co. and
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* its subsidiaries and affiliates (collectly called MKSEMI).
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*
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form, except as embedded into an MKSEMI
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* integrated circuit in a product or a software update for such product,
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* must reproduce the above copyright notice, this list of conditions and
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* the following disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* 3. Neither the name of MKSEMI nor the names of its contributors may be used
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* to endorse or promote products derived from this software without
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* specific prior written permission.
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*
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* 4. This software, with or without modification, must only be used with a
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* MKSEMI integrated circuit.
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*
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* 5. Any software provided in binary form under this license must not be
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* reverse engineered, decompiled, modified and/or disassembled.
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*
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* THIS SOFTWARE IS PROVIDED BY MKSEMI "AS IS" AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL MKSEMI OR CONTRIBUTORS BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "mk_efuse.h"
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#include "mk_clock.h"
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#include "mk_reset.h"
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#include "mk_trace.h"
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int efuse_open(void)
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{
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// enable EFUSE clock
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clock_enable(CLOCK_EFUSE);
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reset_module(RESET_MODULE_EFUSE);
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return DRV_OK;
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}
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int efuse_close(void)
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{
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// disable EFUSE clock
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clock_disable(CLOCK_EFUSE);
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EFUSE_CTRL->CTRL = EFUSE_CTRL_POWER_DOWN_MSK;
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return DRV_OK;
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}
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void efuse_reset(void)
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{
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EFUSE_CTRL->CTRL = EFUSE_CTRL_SOFT_RST_MSK;
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}
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/*
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* Load eFuse content to the shadow register
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*/
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void efuse_reload_all(void)
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{
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EFUSE_CTRL->CTRL = EFUSE_CTRL_ACCESS_EN_MSK | EFUSE_CTRL_ACCESS_MODE(EFUSE_LOAD_ALL);
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while (EFUSE_CTRL->SEQUENCE_CNT & EFUSE_SEQUENCE_CNT_BUSY_MSK)
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{
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}
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}
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/*
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* Reload and read shadow register
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*/
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uint32_t efuse_read_word(uint16_t word_addr)
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{
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ASSERT((word_addr & 0x3) == 0, "The address need word alignment");
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ASSERT(word_addr < 128, "The operation address is over range");
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EFUSE_CTRL->ADDR = EFUSE_ADDR_BYTE_ADDR(word_addr);
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EFUSE_CTRL->CTRL = EFUSE_CTRL_ACCESS_EN_MSK | EFUSE_CTRL_ACCESS_MODE(EFUSE_LOAD_WORD);
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while (EFUSE_CTRL->SEQUENCE_CNT & EFUSE_SEQUENCE_CNT_BUSY_MSK)
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{
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}
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return REG_READ(EFUSE_SHADOW_BASE | word_addr);
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}
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uint8_t efuse_read_byte(uint16_t byte_addr)
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{
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ASSERT(byte_addr < 128, "The operation address is over range");
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EFUSE_CTRL->ADDR = EFUSE_ADDR_BYTE_ADDR(byte_addr);
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EFUSE_CTRL->CTRL = EFUSE_CTRL_ACCESS_EN_MSK | EFUSE_CTRL_ACCESS_MODE(EFUSE_LOAD_BYTE);
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while (EFUSE_CTRL->SEQUENCE_CNT & EFUSE_SEQUENCE_CNT_BUSY_MSK)
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{
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}
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return REG_READ_BYTE(EFUSE_SHADOW_BASE | byte_addr);
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}
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void efuse_read_block(uint16_t byte_addr_start, uint16_t byte_len, uint8_t *buf)
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{
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ASSERT(byte_addr_start + byte_len < 128, "The operation address is over range");
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ASSERT(buf != NULL, "The read buffer pointer is null");
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EFUSE_CTRL->ADDR = EFUSE_ADDR_BYTE_ADDR(byte_addr_start);
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EFUSE_CTRL->LENGTH = byte_len;
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EFUSE_CTRL->CTRL = EFUSE_CTRL_ACCESS_EN_MSK | EFUSE_CTRL_ACCESS_MODE(EFUSE_LOAD_BLOCK);
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while (EFUSE_CTRL->SEQUENCE_CNT & EFUSE_SEQUENCE_CNT_BUSY_MSK)
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{
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}
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for (uint16_t i = 0; i < byte_len; i++)
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{
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*buf++ = REG_READ_BYTE(EFUSE_SHADOW_BASE | (byte_addr_start + i));
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}
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}
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/*
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* Program eFuse
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*/
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void efuse_program_word(uint16_t word_addr, uint32_t data)
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{
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ASSERT((word_addr & 0x3) == 0, "The address need word alignment");
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ASSERT(word_addr > 0, "The first byte need to be programmed by bit");
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ASSERT(word_addr < 128, "The operation address is over range");
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SYSCON->EFUSE_LDO = 0x01;
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REG_WRITE(EFUSE_SHADOW_BASE | word_addr, data);
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EFUSE_CTRL->ADDR = EFUSE_ADDR_BYTE_ADDR(word_addr);
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EFUSE_CTRL->CTRL = EFUSE_CTRL_ACCESS_EN_MSK | EFUSE_CTRL_ACCESS_MODE(EFUSE_PROGRAM_WORD);
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while (EFUSE_CTRL->SEQUENCE_CNT & EFUSE_SEQUENCE_CNT_BUSY_MSK)
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{
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}
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SYSCON->EFUSE_LDO = 0x00;
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}
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void efuse_program_byte(uint16_t byte_addr, uint8_t data)
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{
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ASSERT(byte_addr > 0, "The first byte need to be programmed by bit");
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ASSERT(byte_addr < 128, "The operation address is over range");
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SYSCON->EFUSE_LDO = 0x01;
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REG_WRITE_BYTE(EFUSE_SHADOW_BASE | byte_addr, data);
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EFUSE_CTRL->ADDR = EFUSE_ADDR_BYTE_ADDR(byte_addr);
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EFUSE_CTRL->CTRL = EFUSE_CTRL_ACCESS_EN_MSK | EFUSE_CTRL_ACCESS_MODE(EFUSE_PROGRAM_BYTE);
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while (EFUSE_CTRL->SEQUENCE_CNT & EFUSE_SEQUENCE_CNT_BUSY_MSK)
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{
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}
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SYSCON->EFUSE_LDO = 0x00;
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}
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/*
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set bit to 1, bit_offset: 0 ~ 7
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*/
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void efuse_set_bit(uint16_t byte_addr, uint8_t bit_offset)
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{
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ASSERT(byte_addr < 128, "The operation address is over range");
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ASSERT(bit_offset < 8, "The operation bit offset is over range");
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SYSCON->EFUSE_LDO = 0x01;
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if (byte_addr == EFUSE_STATUS)
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{
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EFUSE_CTRL->ADDR = EFUSE_ADDR_BYTE_ADDR(byte_addr) | EFUSE_ADDR_BIT_OFFSET(bit_offset);
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EFUSE_CTRL->CTRL = EFUSE_CTRL_ACCESS_EN_MSK | EFUSE_CTRL_ACCESS_MODE(EFUSE_PROGRAM_BIT);
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}
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else
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{
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uint8_t val = REG_READ_BYTE(EFUSE_SHADOW_BASE | byte_addr);
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REG_WRITE_BYTE(EFUSE_SHADOW_BASE | byte_addr, (uint8_t)(val | (1 << (bit_offset & 0x7))));
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EFUSE_CTRL->ADDR = EFUSE_ADDR_BYTE_ADDR(byte_addr) | EFUSE_ADDR_BIT_OFFSET(bit_offset);
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EFUSE_CTRL->LENGTH = 1;
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EFUSE_CTRL->CTRL = EFUSE_CTRL_ACCESS_EN_MSK | EFUSE_CTRL_ACCESS_MODE(EFUSE_PROGRAM_BLOCK);
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}
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while (EFUSE_CTRL->SEQUENCE_CNT & EFUSE_SEQUENCE_CNT_BUSY_MSK)
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{
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}
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SYSCON->EFUSE_LDO = 0x00;
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}
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