/*
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* Copyright (c) 2019-2023 Beijing Hanwei Innovation Technology Ltd. Co. and
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* its subsidiaries and affiliates (collectly called MKSEMI).
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*
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form, except as embedded into an MKSEMI
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* integrated circuit in a product or a software update for such product,
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* must reproduce the above copyright notice, this list of conditions and
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* the following disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* 3. Neither the name of MKSEMI nor the names of its contributors may be used
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* to endorse or promote products derived from this software without
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* specific prior written permission.
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*
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* 4. This software, with or without modification, must only be used with a
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* MKSEMI integrated circuit.
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*
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* 5. Any software provided in binary form under this license must not be
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* reverse engineered, decompiled, modified and/or disassembled.
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*
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* THIS SOFTWARE IS PROVIDED BY MKSEMI "AS IS" AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL MKSEMI OR CONTRIBUTORS BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "mk_sbl.h"
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#include "mk_flash.h"
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#include "mk_clock.h"
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#include "mk_trace.h"
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#if !defined(FACT_BAK_MODE) && !defined(AB_CYCLE_MODE)
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#define AB_CYCLE_MODE
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#endif
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#if defined(FACT_BAK_MODE)
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#include "LzmaDec.h"
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#define NORMAL_IMAGE_LOAD_ADDR IMAGE2_LOAD_ADDR
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#define FACT_IMAGE_LOAD_ADDR IMAGE1_LOAD_ADDR
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#endif
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/*
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AB_CYCLE_MODE example
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+---------+--------------+---------+
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| area | start | length |
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+---------+--------------+---------+
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| sbl | 0x04000000 | 12*1024 |
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+---------+--------------+---------+
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| active | | |
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|img flag | 0x04003000 | 4*1024 |
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+---------+--------------+---------+
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| img1 | 0x04004000 | 128*1024|
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+---------+--------------+---------+
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| img2 | 0x04024000 | 128*1024|
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+---------+--------------+---------+
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FACT_BAK_MODE example
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+----------+--------------+---------+
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| area | start | length |
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+----------+--------------+---------+
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| sbl | 0x04000000 | 12*1024 |
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+----------+--------------+---------+
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|compressed| | |
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| factory | 0x04004000 | 128*1024|
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| img | | |
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+----------+--------------+---------+
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|normal img| 0x04024000 | 128*1024|
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+----------+--------------+---------+
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The address and length of each area can be determined based on actual conditions
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*/
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#if defined(FACT_BAK_MODE)
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static char lzma_heap_flag = 0;
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static char lzma_heap[16 * 1024];
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static void *lzma_alloc(ISzAllocPtr p, size_t size)
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{
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if (lzma_heap_flag == 0 && size < sizeof(lzma_heap))
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{
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return lzma_heap;
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}
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return NULL;
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}
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static void lzma_free(ISzAllocPtr p, void *address)
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{
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if (address == lzma_heap)
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{
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lzma_heap_flag = 0;
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}
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}
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static ISzAlloc allocator = {lzma_alloc, lzma_free};
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#endif
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/*
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* Check whether there is a valid image at the specified address
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*/
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int sbl_check_image(uint32_t img_addr, uint32_t *img_cp_len, uint32_t *sp, uint32_t *entry)
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{
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uint32_t *p = (uint32_t *)img_addr;
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struct BOOT_DESC_T *desc;
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if ((p[0] < SRAM_BASE) || (p[0] > (SRAM_BASE + SRAM_SIZE)))
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{
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return -1;
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}
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if (p[1] > (CODE_BASE + SRAM_SIZE))
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{
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return -1;
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}
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if ((p[9] > (CODE_BASE + SRAM_SIZE)) || ((p[9] & 0x03) != 0))
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{
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return -1;
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}
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desc = (struct BOOT_DESC_T *)(img_addr + p[9]);
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if (desc->header_marker != BOOT_HEADER_MARKER)
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{
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return -1;
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}
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if (img_cp_len != NULL)
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{
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*img_cp_len = desc->copy_len;
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}
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if (sp != NULL)
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{
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*sp = p[0];
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}
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if (entry != NULL)
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{
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*entry = p[1] + SRAM_BASE;
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}
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return 0;
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}
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/*
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* Get the address where the activated image is located
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*/
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uint32_t sbl_get_active_image(void)
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{
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#if defined(AB_CYCLE_MODE)
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uint32_t img = REG_READ(IMAGE_FLAG_ADDR);
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if ((img == IMAGE1_LOAD_ADDR) || (img == IMAGE2_LOAD_ADDR))
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{
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return img;
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}
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else
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{
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return 0;
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}
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#else
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return NORMAL_IMAGE_LOAD_ADDR;
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#endif
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}
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/*
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* Set the address of the activated image
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*/
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void sbl_set_active_image(uint32_t img)
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{
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#if defined(AB_CYCLE_MODE)
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if ((img != IMAGE1_LOAD_ADDR) && (img != IMAGE2_LOAD_ADDR))
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{
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return;
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}
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if (sbl_get_active_image() == img)
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{
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return;
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}
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uint32_t flag[64];
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flag[0] = img;
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flash_erase(FLASH_ID0, IMAGE_FLAG_ADDR, FLASH_SECTOR_SIZE);
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flash_write(FLASH_ID0, IMAGE_FLAG_ADDR, (uint8_t *)flag, FLASH_PAGE_SIZE);
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#endif
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}
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/*
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* Get the address where the OTA image is stored
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*/
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uint32_t sbl_get_addr_for_ota(void)
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{
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#if defined(AB_CYCLE_MODE)
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uint32_t len;
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if (sbl_check_image(SRAM_BASE, &len, NULL, NULL) == 0)
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{
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if (memcmp((uint8_t *)IMAGE1_LOAD_ADDR, (uint8_t *)SRAM_BASE, len) == 0)
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{
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return IMAGE2_LOAD_ADDR;
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}
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if (memcmp((uint8_t *)IMAGE2_LOAD_ADDR, (uint8_t *)SRAM_BASE, len) == 0)
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{
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return IMAGE1_LOAD_ADDR;
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}
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}
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ASSERT(0, "A critical error has occurred in flash or RAM\r\n");
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return IMAGE1_LOAD_ADDR;
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#else
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return NORMAL_IMAGE_LOAD_ADDR;
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#endif
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}
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/*
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* Run the specified image
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*/
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static RAM_FUNC void sbl_run_image(uint32_t addr, uint32_t len, uint32_t sp, uint32_t entry);
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#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6100100)
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#pragma clang optimize off
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#elif defined(__GNUC__)
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#pragma GCC diagnostic push
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#pragma GCC optimize("O0")
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#else
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#pragma optimize = none
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#endif
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static void sbl_run_image(uint32_t addr, uint32_t len, uint32_t sp, uint32_t entry)
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{
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static reset_handler_t *sbl2app;
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if (addr != SRAM_BASE)
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{
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memcpy((char *)SRAM_BASE, (char *)addr, len);
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}
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flash_handle[0].base->CMD = FLASH_CMD_DATALEN(0) | FLASH_CMD_POLL(false) | FLASH_CMD_DOUT(FLASH_DATA_OUT) | FLASH_CMD_INTLEN(0) |
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FLASH_CMD_FIELDFORM(FLASH_CMD_ALL_SERIAL) | FLASH_CMD_FRAMEFORM(FLASH_CMD_OP_ONLY) | FLASH_CMD_OPCODE(0xB9);
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SYSCON->SYS_CMU &= ~(1U << CLOCK_FLASH_CTRL);
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sbl2app = (reset_handler_t *)entry;
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__set_MSP(sp);
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sbl2app();
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}
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#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6100100)
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#pragma clang optimize on
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#elif defined(__GNUC__)
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#pragma GCC diagnostic pop
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#endif
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/*
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* Main process of the second boot loader
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*/
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void sbl_main(void)
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{
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uint32_t len, sp, entry, act_img;
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act_img = sbl_get_active_image();
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#if defined(AB_CYCLE_MODE)
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if (act_img == IMAGE1_LOAD_ADDR || act_img == IMAGE2_LOAD_ADDR)
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{
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if (sbl_check_image(act_img, &len, &sp, &entry) == 0)
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{
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sbl_run_image(act_img, len, sp, entry);
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}
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}
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if (sbl_check_image(IMAGE1_LOAD_ADDR, &len, &sp, &entry) == 0)
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{
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sbl_run_image(IMAGE1_LOAD_ADDR, len, sp, entry);
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}
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else if (sbl_check_image(IMAGE2_LOAD_ADDR, &len, &sp, &entry) == 0)
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{
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sbl_run_image(IMAGE2_LOAD_ADDR, len, sp, entry);
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}
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else
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{
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while (1)
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;
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}
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#else
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if (act_img == NORMAL_IMAGE_LOAD_ADDR)
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{
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if (sbl_check_image(act_img, &len, &sp, &entry) == 0)
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{
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sbl_run_image(act_img, len, sp, entry);
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}
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}
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ELzmaStatus status;
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SizeT lzma_hdrlen = LZMA_PROPS_SIZE + sizeof(UInt64);
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SizeT srclen = 128 * 1024 - lzma_hdrlen;
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SizeT deslen = ROM_SIZE;
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SRes res;
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res = LzmaDecode((Byte *)SRAM_BASE, &deslen, (Byte *)FACT_IMAGE_LOAD_ADDR + lzma_hdrlen, &srclen, (Byte *)FACT_IMAGE_LOAD_ADDR,
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LZMA_PROPS_SIZE + sizeof(UInt64), LZMA_FINISH_END, &status, &allocator);
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if (res != SZ_OK || status != LZMA_STATUS_FINISHED_WITH_MARK)
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{
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while (1)
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;
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}
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if (sbl_check_image(SRAM_BASE, &len, &sp, &entry) == 0)
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{
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sbl_run_image(SRAM_BASE, len, sp, entry);
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}
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else
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{
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while (1)
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;
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}
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#endif
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}
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