/*******************************************************************************
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* @note Copyright (C) 2023 Shanghai Panchip Microelectronics Co., Ltd. All rights reserved.
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*
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* @file pan_rf.h
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* @brief
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*
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* @history - V0.8, 2024-4
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*******************************************************************************/
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#ifndef __PAN_RF_H
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#define __PAN_RF_H
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#include "PCA9555.h"
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#include "pan_port.h"
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//#include "lora_3029.h"
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/* result */
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typedef enum
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{
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RF_OK, // Operate ok
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RF_FAIL, // Operate fail
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OK = 0, // Operate ok
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FAIL, // Operate fail
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} RF_Err_t;
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#define RF_ASSERT(fn) \
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do \
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{ \
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if (RF_OK != fn) \
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{ \
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return RF_FAIL; \
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} \
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} while (0);
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#define BIT0 0x01
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#define BIT1 0x02
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#define BIT2 0x04
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#define BIT3 0x08
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#define BIT4 0x10
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#define BIT5 0x20
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#define BIT6 0x40
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#define BIT7 0x80
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#define BIT(v) ((u8)(1 << v)) // mask for bit v
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#define GENMASK(h, l) ((u8)(((1 << (h + 1)) - 1) & (~((1 << l) - 1)))) // mask for bits[h,l]
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#define GET_SHIFT(v) ((__ctz(v))) // bit shift in a uint8_t value
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#define NOBITS ((u8)0x00)
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/* RF mode define*/
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#define RF_MODE_DEEP_SLEEP 0
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#define RF_MODE_SLEEP 1
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#define RF_MODE_STB1 2
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#define RF_MODE_STB2 3
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#define RF_MODE_STB3 4
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#define RF_MODE_TX 5
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#define RF_MODE_RX 6
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/* RF Tx mode */
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#define RF_TX_SINGLE 0
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#define RF_TX_CONTINOUS 1
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/* RF Rx mode */
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#define RF_RX_SINGLE 0
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#define RF_RX_SINGLE_TIMEOUT 1
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#define RF_RX_CONTINOUS 2
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/* RF power maximum ramp */
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#define RF_MAX_RAMP 22
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#define RF_MIN_RAMP 1
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/* System control register */
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#define REG_SYS_CTL 0x00
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#define REG_FIFO_ACC_ADDR 0x01
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/* 3V Logical area register */
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#define REG_OP_MODE 0x02
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/* dcdc calibration select */
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#define CALIBR_REF_CMP 0x01
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#define CALIBR_ZERO_CMP 0x02
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#define CALIBR_IMAX_CMP 0x03
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#define MODEM_MODE_NORMAL 0x01
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#define MODEM_MODE_MULTI_SECTOR 0x02
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#define MODEM_MPA 0x01
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#define MODEM_MPB 0x02
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#define freq_360000000 360000000
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#define freq_370000000 370000000
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#define freq_385000000 385000000
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#define freq_405000000 405000000
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#define freq_415000000 415000000
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#define freq_430000000 430000000
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#define freq_445000000 445000000
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#define freq_465000000 465000000
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#define freq_485000000 485000000
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#define freq_495000000 495000000
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#define freq_505000000 505000000
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#define freq_530000000 530000000
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#define freq_565000000 565000000
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#define freq_600000000 600000000
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#define freq_720000000 720000000
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#define freq_740000000 740000000
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#define freq_770000000 770000000
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#define freq_810000000 810000000
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#define freq_830000000 830000000
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#define freq_860000000 860000000
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#define freq_890000000 890000000
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#define freq_930000000 930000000
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#define freq_970000000 970000000
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#define freq_1010000000 1010000000
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#define freq_1060000000 1060000000
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#define freq_1080000000 1080000000
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#define CODE_RATE_45 0x01
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#define CODE_RATE_46 0x02
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#define CODE_RATE_47 0x03
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#define CODE_RATE_48 0x04
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#define SF_5 5
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#define SF_6 6
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#define SF_7 7
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#define SF_8 8
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#define SF_9 9
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#define SF_10 10
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#define SF_11 11
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#define SF_12 12
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#define BW_62_5K 6
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#define BW_125K 7
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#define BW_250K 8
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#define BW_500K 9
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#define CRC_OFF 0
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#define CRC_ON 1
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#define PLHD_IRQ_OFF 0
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#define PLHD_IRQ_ON 1
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#define PLHD_OFF 0
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#define PLHD_ON 1
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#define PLHD_LEN8 0
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#define PLHD_LEN16 1
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#define AGC_ON 1
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#define AGC_OFF 0
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#define LO_400M 0
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#define LO_800M 1
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#define DCDC_OFF 0
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#define DCDC_ON 1
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#define LDR_OFF 0
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#define LDR_ON 1
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#define MAPM_OFF 0
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#define MAPM_ON 1
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#define CAD_DETECT_THRESHOLD_0A 0x0A
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#define CAD_DETECT_THRESHOLD_10 0x10
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#define CAD_DETECT_THRESHOLD_15 0x15
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#define CAD_DETECT_THRESHOLD_20 0x20
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#define CAD_DETECT_NUMBER_1 0x01
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#define CAD_DETECT_NUMBER_2 0x02
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#define CAD_DETECT_NUMBER_3 0x03
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#define REG_PAYLOAD_LEN 0x0C
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/*IRQ BIT MASK*/
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#define REG_IRQ_MAPM_DONE 0x40
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#define REG_IRQ_RX_PLHD_DONE 0x10
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#define REG_IRQ_RX_DONE 0x08
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#define REG_IRQ_CRC_ERR 0x04
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#define REG_IRQ_RX_TIMEOUT 0x02
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#define REG_IRQ_TX_DONE 0x01
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#define DEFAULT_PWR 22
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#define DEFAULT_FREQ (491000000)
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#define DEFAULT_SF SF_5
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#define DEFAULT_BW BW_500K
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#define DEFAULT_up_FREQ (470000000)
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#define DEFAULT_up_SF SF_5
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#define DEFAULT_WG_SET_FREQ (478000000)
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#define DEFAULT_WG_SET_SF SF_7
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#define DEFAULT_CR CODE_RATE_45
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#define RADIO_FLAG_IDLE 0
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#define RADIO_FLAG_TXDONE 1
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#define RADIO_FLAG_RXDONE 2
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#define RADIO_FLAG_RXTIMEOUT 3
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#define RADIO_FLAG_RXERR 4
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#define RADIO_FLAG_PLHDRXDONE 5
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#define RADIO_FLAG_MAPM 6
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#define LEVEL_INACTIVE 0
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#define LEVEL_ACTIVE 1
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//#define GPIO_PIN_IRQ LORA_DIO
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//#define GPIO_PORT_IRQ PortB
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//#define GPIO_PIN_CAD Pin09
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//#define GPIO_PORT_CAD PortA
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#define CHECK_IRQ() gpio_pin_get_val(LORA_DIO)
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#define CHECK_CAD() gpio_pin_get_val(0)
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#define SET_TIMER_MS(time) timer6_open_ms(time)
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#define TEST_MODE_BUFFER_LEN 10
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enum REF_CLK_SEL {REF_CLK_32M,REF_CLK_16M};
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enum PAGE_SEL {PAGE0_SEL,PAGE1_SEL,PAGE2_SEL, PAGE3_SEL};
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enum MAPM_LASTADDR_FUNC {ORDINARY_ADDR,FIELD_COUNTER};
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#pragma pack(1)
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typedef struct
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{
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enum PAGE_SEL page;
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uint8_t addr;
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uint8_t value;
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}pan_reg_cfg_t;
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struct RxDoneMsg
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{
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uint8_t Payload[255];
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uint8_t PlhdPayload[16];
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uint8_t TestModePayload[TEST_MODE_BUFFER_LEN];
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uint16_t PlhdSize;
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uint16_t Size;
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uint16_t mpam_recv_index;
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uint8_t mpam_recv_buf[1024]; //set buf size based on actual application
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int8_t Rssi;
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float Snr;
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};
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#pragma pack ()
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typedef struct
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{
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uint8_t mapm_addr[4];
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uint8_t fn;
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uint8_t fnm;
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uint8_t gfs;
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uint8_t gn;
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uint8_t pg1;
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uint8_t pgn;
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uint16_t pn;
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} stc_mapm_cfg_t;
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#pragma pack(1)
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typedef struct
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{
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uint8_t ramp;
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uint8_t pa_trim;
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uint8_t pa_ldo;
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uint8_t pa_duty;
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} power_ramp_t;
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#pragma pack ()
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#pragma pack(1)
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typedef struct
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{
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uint8_t ramp;
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uint8_t pa_ldo;
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uint8_t pa_duty;
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} power_ramp_cfg_t;
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#pragma pack ()
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uint8_t rf_read_reg(uint8_t addr);
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uint8_t rf_write_reg(uint8_t addr, uint8_t value);
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void rf_write_fifo(uint8_t addr, uint8_t *buffer, int size);
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void rf_read_fifo(uint8_t addr, uint8_t *buffer, int size);
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RF_Err_t rf_switch_page(enum PAGE_SEL page);
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uint8_t rf_read_spec_page_reg(enum PAGE_SEL page, uint8_t addr);
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RF_Err_t rf_read_spec_page_regs(enum PAGE_SEL page, uint8_t addr, uint8_t *buffer, uint8_t len);
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RF_Err_t rf_write_spec_page_reg(enum PAGE_SEL page, uint8_t addr, uint8_t value);
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RF_Err_t rf_write_spec_page_regs(enum PAGE_SEL page, uint8_t addr, uint8_t *buffer, uint8_t len);
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uint8_t rf_clr_irq(uint8_t flags);
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uint8_t rf_get_irq(void);
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RF_Err_t rf_refresh(void);
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uint16_t rf_read_pkt_cnt(void);
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void rf_clr_pkt_cnt(void);
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RF_Err_t rf_agc_enable(bool NewState);
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RF_Err_t rf_set_agc(bool NewState);
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RF_Err_t rf_ft_calibr(void);
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RF_Err_t rf_reg_cfg(void);
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RF_Err_t rf_init(void);
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RF_Err_t rf_sleep_wakeup(void);
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RF_Err_t rf_deepsleep(void);
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RF_Err_t rf_sleep(void);
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RF_Err_t rf_set_lo_freq(uint32_t lo);
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RF_Err_t rf_set_freq(uint32_t freq);
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uint32_t rf_read_freq(void);
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uint32_t rf_get_tx_time(uint8_t size);
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RF_Err_t rf_set_bw(uint8_t bw_val);
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uint8_t rf_get_bw(void);
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RF_Err_t rf_set_sf(uint8_t sf_val);
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uint8_t rf_get_sf(void);
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RF_Err_t rf_set_crc(bool NewState);
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uint8_t rf_get_crc(void);
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RF_Err_t rf_set_code_rate(uint8_t code_rate);
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uint8_t rf_get_code_rate(void);
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RF_Err_t rf_set_mode(uint8_t mode);
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uint8_t rf_get_mode(void);
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RF_Err_t rf_set_tx_mode(uint8_t mode);
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RF_Err_t rf_set_rx_mode(uint8_t mode);
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RF_Err_t rf_set_modem_mode(uint8_t mode);
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RF_Err_t rf_set_rx_single_timeout(uint16_t timeout);
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float rf_get_snr(void);
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int8_t rf_get_rssi(void);
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int8_t rf_get_channel_rssi(void);
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RF_Err_t rf_set_tx_power(uint8_t tx_power);
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uint8_t rf_get_tx_power(void);
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RF_Err_t rf_set_preamble(uint16_t reg);
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uint16_t rf_get_preamble(void);
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RF_Err_t rf_set_gpio_input(uint8_t gpio_pin);
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RF_Err_t rf_set_gpio_output(uint8_t gpio_pin);
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RF_Err_t rf_set_gpio_state(uint8_t gpio_pin, uint8_t state);
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bool rf_get_gpio_state(uint8_t gpio_pin);
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RF_Err_t rf_cad_on(uint8_t threshold, uint8_t chirps);
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RF_Err_t rf_cad_off(void);
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RF_Err_t rf_set_syncword(uint8_t sync);
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uint8_t rf_get_syncword(void);
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RF_Err_t rf_send_packet(uint8_t *buff, int len);
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uint8_t rf_recv_packet(uint8_t *buff);
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RF_Err_t rf_set_early_irq(bool NewState);
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bool rf_get_early_irq(void);
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RF_Err_t rf_set_plhd(uint8_t addr, uint8_t len);
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uint8_t rf_get_plhd_len(void);
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RF_Err_t rf_set_plhd_mask(uint8_t plhd_val);
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uint8_t rf_get_plhd_mask(void);
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uint8_t rf_plhd_receive(uint8_t *buf, uint8_t len);
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void rf_set_plhd_rx_on(uint8_t addr, uint8_t len);
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void rf_set_plhd_rx_off(void);
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RF_Err_t rf_set_dcdc_mode(uint8_t dcdc_val);
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RF_Err_t rf_set_ldr(uint32_t mode);
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bool rf_get_ldr(void);
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int calculate_chirp_count(int sf_range[], int size, int chirp_counts[]);
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RF_Err_t rf_set_auto_sf_tx_preamble(int sf, int sf_range[], int size, int chirp_counts[]);
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RF_Err_t rf_set_auto_sf_rx_on(int sf_range[], int size);
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RF_Err_t rf_set_auto_sf_rx_off(void);
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RF_Err_t rf_set_carrier_wave_on(void);
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RF_Err_t rf_set_carrier_wave_freq(uint32_t freq);
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RF_Err_t rf_set_carrier_wave_off(void);
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RF_Err_t carrier_wave_test_mode(void);
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RF_Err_t rf_mapm_en(void);
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RF_Err_t rf_mapm_dis(void);
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RF_Err_t rf_set_mapm_mask(uint8_t mapm_val);
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RF_Err_t rf_set_mapm_para(uint8_t field_num_mux, uint8_t group_fun_sel, uint8_t gn, uint8_t pgn);
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RF_Err_t rf_set_mapm_addr(uint8_t addr_no, uint8_t addr);
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uint32_t rf_calculate_mapm_preambletime(stc_mapm_cfg_t *mapm_cfg, uint32_t one_chirp_time);
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uint8_t rf_get_mapm_field_num(void);
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RF_Err_t rf_set_mapm_field_num(uint8_t);
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RF_Err_t rf_set_mapm_field_num_mux(uint8_t fnm);
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RF_Err_t rf_set_mapm_group_fun_sel(uint8_t gfs);
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RF_Err_t rf_set_mapm_group_num(uint8_t gn);
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RF_Err_t rf_set_mapm_firgroup_preamble_num(uint8_t pgl);
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RF_Err_t rf_set_mapm_group_preamble_num(uint8_t pgn);
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RF_Err_t rf_set_mapm_neces_preamble_num(uint16_t pn);
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void rf_set_mapm_on(void);
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void rf_set_mapm_off(void);
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void rf_set_mapm_cfg(stc_mapm_cfg_t *p_mapm_cfg);
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RF_Err_t rf_efuse_on(void);
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RF_Err_t rf_efuse_off(void);
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uint8_t rf_efuse_read_encry_byte(uint8_t reg_addr, uint16_t pattern, uint8_t efuse_addr);
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uint8_t rf_efuse_read_byte(uint8_t reg_addr, uint8_t efuse_addr);
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void rf_efuse_write_encry_byte(uint8_t reg_addr, uint16_t pattern, uint8_t efuse_addr, uint8_t value);
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void rf_efuse_write_byte(uint8_t reg_addr, uint8_t efuse_addr, uint8_t value);
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RF_Err_t rf_set_dcdc_calibr_on(uint8_t calibr_type);
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RF_Err_t rf_set_dcdc_calibr_off(void);
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RF_Err_t rf_set_ldo_pa_on(void);
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RF_Err_t rf_set_ldo_pa_off(void);
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RF_Err_t rf_enter_continous_rx(void);
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RF_Err_t rf_enter_single_timeout_rx(uint32_t timeout);
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RF_Err_t rf_enter_single_rx(void);
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RF_Err_t rf_single_tx_data(uint8_t *buf, uint8_t size, uint32_t *tx_time);
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RF_Err_t rf_enter_continous_tx(void);
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RF_Err_t rf_continous_tx_send_data(uint8_t *buf, uint8_t size);
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void rf_irq_process(void);
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uint32_t rf_get_chirp_time(uint8_t bw, uint8_t sf);
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bool check_cad_rx_inactive(uint32_t one_chirp_time);
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//RF_Err_t rf_set_default_para(void);
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RF_Err_t rf_set_default_para(uint32_t freq, uint8_t sf);
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int rf_get_recv_flag(void);
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void rf_set_recv_flag(int status);
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int rf_get_transmit_flag(void);
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void rf_set_transmit_flag(int status);
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#endif
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