/*
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* Copyright (c) 2019-2023 Beijing Hanwei Innovation Technology Ltd. Co. and
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* its subsidiaries and affiliates (collectly called MKSEMI).
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*
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form, except as embedded into an MKSEMI
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* integrated circuit in a product or a software update for such product,
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* must reproduce the above copyright notice, this list of conditions and
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* the following disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* 3. Neither the name of MKSEMI nor the names of its contributors may be used
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* to endorse or promote products derived from this software without
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* specific prior written permission.
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*
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* 4. This software, with or without modification, must only be used with a
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* MKSEMI integrated circuit.
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*
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* 5. Any software provided in binary form under this license must not be
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* reverse engineered, decompiled, modified and/or disassembled.
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*
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* THIS SOFTWARE IS PROVIDED BY MKSEMI "AS IS" AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL MKSEMI OR CONTRIBUTORS BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef MK_SPI_H_
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#define MK_SPI_H_
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#include "mk_common.h"
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#include "mk_dma.h"
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#ifndef SPI_INT_MODE_EN
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#define SPI_INT_MODE_EN (1)
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#endif
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#ifndef SPI_DMA_MODE_EN
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#define SPI_DMA_MODE_EN (1)
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#endif
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#ifndef SPI_POLL_MODE_EN
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#define SPI_POLL_MODE_EN (1)
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#endif
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/**
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* @addtogroup MK8000_SPI
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* @{
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*/
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#define SPI_SCR_MAX (255)
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#define SPI_SCR_MIN (0)
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#define SPI_CPSDVSR_MAX (254)
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#define SPI_CPSDVSR_MIN (2)
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#define SPI_DATA_BITS_MAX (16)
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#define SPI_DATA_BITS_MIN (4)
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#define SPI_DMA_ABORT_TX (1 << 0)
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#define SPI_DMA_ABORT_RX (1 << 1)
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/**
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* @brief SPI device IDs enumeration
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*/
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enum SPI_DEV_T
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{
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SPI_ID0 = 0,
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SPI_ID1,
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SPI_MAX_NUM
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};
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/**
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* @brief SPI state enumeration
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*/
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enum SPI_STATE_T
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{
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SPI_STATE_RESET = 0x00U, /*!< Peripheral not Initialized */
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SPI_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */
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SPI_STATE_BUSY_TX = 0x10U, /*!< Data Transmission process is ongoing */
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SPI_STATE_BUSY_RX = 0x20U, /*!< Data Reception process is ongoing */
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SPI_STATE_BUSY_TX_RX = 0x30U, /*!< Data Transmission and Reception process is ongoing */
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SPI_STATE_TIMEOUT = 0x40U, /*!< SPI timeout */
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SPI_STATE_ERROR = 0x80U, /*!< SPI error state */
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};
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/**
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* @brief SPI config structure
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*/
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struct SPI_CFG_T
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{
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uint32_t bit_rate; /*!< Specifies the bit rate */
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uint8_t data_bits; /*!< Specifies the data bits. \n
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This parameter ranges from SPI_DATA_BITS_MIN to SPI_DATA_BITS_MAX.
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*/
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uint8_t slave : 1; /*!< Specifies the SPI operating mode. \n
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This parameter will be one of the following values:
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@arg 0 master mode
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@arg 1 slave mode
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*/
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uint8_t clk_phase : 1; /*!< Specifies the clock active edge for the bit capture. \n
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This parameter will be one of the following values:
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@arg 0 first edge
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@arg 1 second edge
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*/
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uint8_t clk_polarity : 1; /*!< Specifies the serial clock steady state. \n
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This parameter will be one of the following values:
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@arg 0 low level
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@arg 1 high level
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*/
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uint8_t ti_mode : 1; /*!< Specifies whether the TI mode is enabled or disabled. \n
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This parameter will be one of the following values:
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@arg 0 disabled
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@arg 1 enabled
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*/
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uint8_t dma_rx : 1; /*!< Specifies whether the dma Rx is enabled or disabled. \n
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This parameter will be one of the following values:
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@arg 0 disabled
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@arg 1 enabled
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*/
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uint8_t dma_tx : 1; /*!< Specifies whether the dma Tx is enabled or disabled. \n
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This parameter will be one of the following values:
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@arg 0 disabled
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@arg 1 enabled
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*/
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uint8_t int_rx : 1; /*!< Specifies whether Rx interupt in the NVIC interrupt controller is enabled or disabled. \n
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This parameter will be one of the following values:
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@arg 0 disabled
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@arg 1 enabled
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*/
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uint8_t int_tx : 1; /*!< Specifies whether Tx interupt in the NVIC interrupt controller is enabled or disabled. \n
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This parameter will be one of the following values:
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@arg 0 disabled
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@arg 1 enabled
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*/
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uint8_t reserved[2]; /*!< reserved */
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};
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/**
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* @brief SPI handle Structure
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*/
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struct SPI_HANDLE_T
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{
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SPI_TypeDef *const base; /*!< SPI registers base address */
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const IRQn_Type irq; /*!< SPI interupt number */
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enum DMA_CH_T dma_rx_ch; /*!< SPI dma Rx channel */
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enum DMA_CH_T dma_tx_ch; /*!< SPI dma Tx channel */
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__IOM enum SPI_STATE_T state; /*!< SPI state */
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uint8_t slave : 1; /*!< SPI operating mode switch */
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uint8_t dma_rx : 1; /*!< SPI dma Rx switch */
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uint8_t dma_tx : 1; /*!< SPI dma Tx switch */
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uint8_t int_rx : 1; /*!< SPI Rx interupt switch */
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uint8_t int_tx : 1; /*!< SPI Tx interupt switch */
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uint8_t reserved0 : 3; /*!< reserved */
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uint8_t reserved1; /*!< reserved */
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uint16_t tx_dummy; /*!< SPI send data when receive data only */
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uint8_t *tx_buff; /*!< Pointer to SPI Tx transfer Buffer */
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uint32_t tx_size; /*!< SPI Tx Transfer size */
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__IOM uint32_t tx_count; /*!< SPI Tx Transfer Counter */
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uint8_t *rx_buff; /*!< Pointer to SPI Rx transfer Buffer */
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uint32_t rx_size; /*!< SPI Rx Transfer size */
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__IOM uint32_t rx_count; /*!< SPI Rx Transfer Counter */
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drv_callback_t tx_callback; /*!< Pointer to SPI Tx Callback function */
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drv_callback_t rx_callback; /*!< Pointer to SPI Rx Callback function */
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drv_callback_t tx_abort_callback; /*!< Pointer to SPI Tx abort Callback function */
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drv_callback_t rx_abort_callback; /*!< Pointer to SPI Rx abort Callback function */
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};
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief open SPI
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* @param[in] id SPI device ID. \n
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* This parameter should be one of the SPI_DEV_T enum values as below
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* @arg SPI_ID0 spi0
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* @arg SPI_ID1 spi1
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* @param[in] config pointer to a SPI_CFG_T structure that contains the configuration information for SPI. \n
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* @return
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* @arg DRV_ERROR error id
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* @arg DEV_OK open succeed
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*/
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int spi_open(enum SPI_DEV_T id, struct SPI_CFG_T *config);
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/**
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* @brief close SPI
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* @param[in] id SPI device ID. \n
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* This parameter should be one of the SPI_DEV_T enum values as below
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* @arg SPI_ID0 spi0
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* @arg SPI_ID1 spi1
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* @return
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* @arg DRV_ERROR error id
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* @arg DEV_OK open succeed
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*/
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int spi_close(enum SPI_DEV_T id);
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/**
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* @brief Sends an amount of data.
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* @param[in] id SPI device ID. \n
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* This parameter should be one of the SPI_DEV_T enum values as below
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* @arg SPI_ID0 spi0
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* @arg SPI_ID1 spi1
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* @param[in] tx_buf Pointer to data buffer
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* @param[in] len Bytes of data to be sent
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* @param[in] callback Pointer to SPI Tx Callback function.
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* @return
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* @arg DRV_ERROR error id
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* @arg DRV_BUSY send failed because of SPI Tx is busy
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* @arg DEV_OK send succeed
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*/
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int spi_send(enum SPI_DEV_T id, uint8_t *tx_buf, uint32_t len, drv_callback_t callback);
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/**
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* @brief Receive an amount of data.
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* @param[in] id SPI device ID. \n
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* This parameter should be one of the SPI_DEV_T enum values as below
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* @arg SPI_ID0 spi0
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* @arg SPI_ID1 spi1
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* @param[out] rx_buf Pointer to data buffer
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* @param[in] len Bytes of data to be received
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* @param[in] callback Pointer to SPI Rx Callback function.
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* @return
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* @arg DRV_ERROR error id
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* @arg DRV_BUSY send failed because of SPI Tx is busy
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* @arg DEV_OK send succeed
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*/
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int spi_receive(enum SPI_DEV_T id, uint8_t *rx_buf, uint32_t len, drv_callback_t callback);
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/**
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* @brief Send and Receive an amount of data.
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* @param[in] id SPI device ID. \n
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* This parameter should be one of the SPI_DEV_T enum values as below
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* @arg SPI_ID0 spi0
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* @arg SPI_ID1 spi1
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* @param[in] tx_buf Pointer to data buffer
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* @param[out] rx_buf Pointer to data buffer
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* @param[in] len Bytes of data to be sent and received
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* @param[in] callback Pointer to SPI transfter Callback function.
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* @return
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* @arg DRV_ERROR error id
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* @arg DRV_BUSY send failed because of SPI Tx is busy
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* @arg DEV_OK send succeed
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*/
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int spi_transfer(enum SPI_DEV_T id, uint8_t *tx_buf, uint8_t *rx_buf, uint32_t len, drv_callback_t callback);
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/**
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* @brief Check whether the SPI is busy
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* @param[in] id SPI device ID. \n
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* This parameter should be one of the SPI_DEV_T enum values as below
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* @arg SPI_ID0 spi0
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* @arg SPI_ID1 spi1
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* @return
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* @arg true SPI is busy
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* @arg false SPI is idle
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*/
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bool spi_is_busy(enum SPI_DEV_T id);
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/**
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* @brief Get SPI state
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* @param[in] id SPI device ID. \n
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* This parameter should be one of the SPI_DEV_T enum values as below
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* @arg SPI_ID0 uart0
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* @arg SPI_ID1 uart1
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* @return
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* @arg SPI_STATE_T SPI state
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*/
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enum SPI_STATE_T spi_state_get(enum SPI_DEV_T id);
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/**
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* @brief Abort ongoing transfer
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* @param[in] id SPI device ID. \n
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* This parameter should be one of the SPI_DEV_T enum values as below
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* @arg SPI_ID0 spi0
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* @arg SPI_ID1 spi1
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* @note This function is used to terminate the ongoing spi tx and rx communication,
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* if the tx or rx communication is completed before spi dma abort, the callback function
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* will not be called.
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* @param[in] abort_direction SPI_DMA_ABORT_TX abort spi dma tx, SPI_DMA_ABORT_RX abort spi dma rx
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* @param[in] abort_tx_callback DMA SPI tx communication abort callback
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* @param[in] abort_rx_callback DMA SPI rx communication abort callback
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* @return @arg DRV_ERROR Abort error
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* @arg DEV_OK Disable SPI DMA tx/rx request succeed
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*/
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int spi_abort_dma(enum SPI_DEV_T id, uint32_t abort_direction, drv_callback_t abort_tx_callback, drv_callback_t abort_rx_callback);
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/**
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* @brief This function handles SP0 interrupt.
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*/
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void SPI0_IRQHandler(void);
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/**
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* @brief This function handles SP1 interrupt.
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*/
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void SPI1_IRQHandler(void);
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#ifdef __cplusplus
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}
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#endif
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/**
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* @}
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*/
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#endif /* MK_SPI_H_ */
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