/*
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* Copyright (C) 2010-2019 Arm Limited or its affiliates. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the License); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an AS IS BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/* ----------------------------------------------------------------------
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* Project: CMSIS NN Library
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* Title: arm_depthwise_conv_u8_basic_ver1.c
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* Description: u8 depthwise convolution function
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*
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* $Date: June, 2019
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* $Revision: V.0.8.0
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*
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* Target : Cortex-M cores with DSP extension
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*
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* -------------------------------------------------------------------- */
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#include "arm_math.h"
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#include "arm_nnfunctions.h"
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#include <stdint.h>
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#include <stdio.h>
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#define DILATION_X (1)
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#define DILATION_Y (1)
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/**
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* @ingroup groupNN
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*/
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/**
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* @addtogroup NNConv
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* @{
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*/
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/**
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* @brief uint8 depthwise convolution function with asymmetric quantization for even number of channel multiplier
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* and input channels. Unless specified otherwise, arguments are mandatory. Both square and non-square inputs
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* are accepted.
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*
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* @param[in] input Pointer to input tensor
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* @param[in] input_x Width of input tensor
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* @param[in] input_y Height of input tensor
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* @param[in] input_ch Channels in input tensor
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* @param[in] kernel Pointer to kernel weights
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* @param[in] kernel_x Width of kernel
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* @param[in] kernel_y Height of kernel
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* @param[in] ch_mult Number of channel multiplier
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* @param[in] pad_x Padding sizes x
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* @param[in] pad_y Padding sizes y
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* @param[in] stride_x Convolution stride along the width
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* @param[in] stride_y Convolution stride along the height
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* @param[in] dilation_x Dilation along width. Not used and intended for future enhancement.
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* @param[in] dilation_y Dilation along height. Not used and intended for future enhancement.
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* @param[in] bias Pointer to optional bias values. If no bias is
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* availble, NULL is expected
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* @param[in] input_offset Input tensor zero offset
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* @param[in] filter_offset Kernel tensor zero offset
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* @param[in] output_offset Output tensor zero offset
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* @param[in,out] output Pointer to output tensor
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* @param[in] output_x Width of output tensor
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* @param[in] output_y Height of output tensor
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* @param[in] output_activation_min Minimum value to clamp the output to. Range : {0, 255}
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* @param[in] output_activation_max Minimum value to clamp the output to. Range : {0, 255}
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* @param[in] out_shift Amount of right-shift for output
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* @param[in] out_mult Output multiplier for requantization
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* @return The function returns one of the following
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* <code>ARM_MATH_SIZE_MISMATCH</code> - Not supported dimension of tensors
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* <code>ARM_MATH_SUCCESS</code> - Successful operation
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* <code>ARM_MATH_ARGUMENT_ERROR</code> - Implementation not available
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*
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* <b> Input constraints</b>
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* ch_mult is multiple of 2
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* kernel_x is multiple of 2
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*
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*/
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arm_status arm_depthwise_conv_u8_basic_ver1(const uint8_t *input,
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const uint16_t input_x,
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const uint16_t input_y,
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const uint16_t input_ch,
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const uint8_t *kernel,
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const uint16_t kernel_x,
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const uint16_t kernel_y,
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const int16_t ch_mult,
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const int16_t pad_x,
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const int16_t pad_y,
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const int16_t stride_x,
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const int16_t stride_y,
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const int16_t dilation_x,
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const int16_t dilation_y,
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const int32_t *bias,
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const int32_t input_offset,
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const int32_t filter_offset,
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const int32_t output_offset,
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uint8_t *output,
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const uint16_t output_x,
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const uint16_t output_y,
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const int32_t output_activation_min,
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const int32_t output_activation_max,
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const int32_t out_shift,
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const int32_t out_mult)
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{
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arm_status status = ARM_MATH_SUCCESS;
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#if defined (ARM_MATH_DSP)
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int i_out = 0;
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(void)dilation_x;
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(void)dilation_y;
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const int32_t input_offset_pkd = (input_offset & 0xFFFF) | (input_offset & 0xFFFF) << 16;
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const int32_t kernel_offset_pkd = (filter_offset & 0xFFFF) | (filter_offset & 0xFFFF) << 16;
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if (0 != ch_mult % 2 || 0 != kernel_x % 2)
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{
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return ARM_MATH_SIZE_MISMATCH;
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}
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for (int i_out_y = 0; i_out_y < output_y; i_out_y++)
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{
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const int16_t base_idx_y = (i_out_y * stride_y) - pad_y;
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for (int i_out_x = 0; i_out_x < output_x; i_out_x++)
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{
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const int16_t base_idx_x = (i_out_x * stride_x) - pad_x;
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for (int i_input_ch = 0; i_input_ch < input_ch; i_input_ch++)
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{
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for (int i_ch_mult = 0; i_ch_mult < ch_mult; i_ch_mult += 2)
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{
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const int idx_out_ch = i_ch_mult + i_input_ch * ch_mult;
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int32_t acc_0 = 0;
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int32_t acc_1 = 0;
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if (NULL != bias)
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{
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acc_0 = bias[idx_out_ch];
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acc_1 = bias[idx_out_ch + 1];
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}
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for (int i_ker_y = 0; i_ker_y < kernel_y; i_ker_y++)
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{
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const int32_t idx_y = base_idx_y + DILATION_Y * i_ker_y;
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const int32_t y_in_range = (idx_y >= 0) && (idx_y < input_y);
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for (int i_ker_x = 0; i_ker_x < kernel_x; i_ker_x += 2)
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{
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if (1 == y_in_range)
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{
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const int32_t idx_x = base_idx_x + DILATION_X * i_ker_x;
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const int32_t idx_x1 = base_idx_x + DILATION_X * (i_ker_x + 1);
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/* Range check for first input */
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if (idx_x >= 0 && idx_x < input_x)
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{
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const int32_t idx_0 = (idx_y * input_x + idx_x) * input_ch + i_input_ch;
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const int32_t ker_idx_0 =
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(i_ker_y * kernel_x + i_ker_x) * (input_ch * ch_mult) + idx_out_ch;
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const int32_t ker_idx_1 = ker_idx_0 + input_ch * ch_mult;
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int32_t input_pkd = input[idx_0] | (input[idx_0 + input_ch] << 16);
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int32_t kernel_pkd = kernel[ker_idx_0] | (kernel[ker_idx_1] << 16);
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input_pkd = __SADD16(input_pkd, input_offset_pkd);
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kernel_pkd = __SADD16(kernel_pkd, kernel_offset_pkd);
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/* Range check for second input */
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if (idx_x1 >= input_x)
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{
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input_pkd &= 0xFFFF;
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}
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acc_0 = __SMLAD(input_pkd, kernel_pkd, acc_0);
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kernel_pkd = kernel[ker_idx_0 + 1] | (kernel[ker_idx_1 + 1] << 16);
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kernel_pkd = __SADD16(kernel_pkd, kernel_offset_pkd);
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acc_1 = __SMLAD(input_pkd, kernel_pkd, acc_1);
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}
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}
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}
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}
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/* Requantize and clamp output to provided range */
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acc_0 = arm_nn_divide_by_power_of_two(arm_nn_sat_doubling_high_mult(
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acc_0 * (1 << LEFT_SHIFT(out_shift)), out_mult),
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RIGHT_SHIFT(out_shift));
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acc_0 += output_offset;
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if (output_activation_min > acc_0)
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{
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acc_0 = output_activation_min;
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}
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if (acc_0 > output_activation_max)
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{
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acc_0 = output_activation_max;
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}
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output[i_out++] = acc_0;
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/* Requantize and clamp output to provided range */
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acc_1 = arm_nn_divide_by_power_of_two(arm_nn_sat_doubling_high_mult(
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acc_1 * (1 << LEFT_SHIFT(out_shift)), out_mult),
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RIGHT_SHIFT(out_shift));
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acc_1 += output_offset;
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if (output_activation_min > acc_1)
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{
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acc_1 = output_activation_min;
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}
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if (acc_1 > output_activation_max)
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{
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acc_1 = output_activation_max;
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}
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output[i_out++] = acc_1;
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}
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}
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}
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}
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#else
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/* No available implementation. */
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status = ARM_MATH_ARGUMENT_ERROR;
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#endif
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return status;
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}
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/**
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* @} end of NNConv group
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*/
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