/**
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******************************************************************************
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* @file stm3210e_eval_fsmc_nor.c
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* @author MCD Application Team
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* @version V4.5.0
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* @date 07-March-2011
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* @brief This file provides a set of functions needed to drive the M29W128FL,
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* M29W128GL and S29GL128P NOR memories mounted on STM3210E-EVAL board.
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******************************************************************************
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* @attention
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*
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* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
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* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
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* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
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* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
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* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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*
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* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "stm3210e_eval_fsmc_nor.h"
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/** @addtogroup Utilities
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* @{
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*/
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/** @addtogroup STM32_EVAL
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* @{
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*/
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/** @addtogroup STM3210E_EVAL
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* @{
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*/
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/** @addtogroup STM3210E_EVAL_FSMC_NOR
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* @brief This file provides a set of functions needed to drive the M29W128FL,
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* M29W128GL and S29GL128P NOR memories mounted on STM3210E-EVAL board.
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* @{
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*/
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/** @defgroup STM3210E_EVAL_FSMC_NOR_Private_Types
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* @{
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*/
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/**
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* @}
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*/
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/** @defgroup STM3210E_EVAL_FSMC_NOR_Private_Defines
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* @{
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*/
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/**
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* @brief FSMC Bank 1 NOR/SRAM2
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*/
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#define Bank1_NOR2_ADDR ((uint32_t)0x64000000)
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/* Delay definition */
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#define BlockErase_Timeout ((uint32_t)0x00A00000)
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#define ChipErase_Timeout ((uint32_t)0x30000000)
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#define Program_Timeout ((uint32_t)0x00001400)
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/**
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* @}
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*/
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/** @defgroup STM3210E_EVAL_FSMC_NOR_Private_Macros
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* @{
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*/
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#define ADDR_SHIFT(A) (Bank1_NOR2_ADDR + (2 * (A)))
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#define NOR_WRITE(Address, Data) (*(__IO uint16_t *)(Address) = (Data))
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/**
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* @}
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*/
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/** @defgroup STM3210E_EVAL_FSMC_NOR_Private_Variables
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* @{
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*/
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/**
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* @}
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*/
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/** @defgroupSTM3210E_EVAL_FSMC_NOR_Private_Function_Prototypes
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* @{
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*/
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/**
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* @}
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*/
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/** @defgroup STM3210E_EVAL_FSMC_NOR_Private_Functions
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* @{
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*/
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/**
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* @brief Configures the FSMC and GPIOs to interface with the NOR memory.
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* This function must be called before any write/read operation
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* on the NOR.
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* @param None
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* @retval None
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*/
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void NOR_Init(void)
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{
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FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure;
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FSMC_NORSRAMTimingInitTypeDef p;
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GPIO_InitTypeDef GPIO_InitStructure;
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOE |
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RCC_APB2Periph_GPIOF | RCC_APB2Periph_GPIOG, ENABLE);
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/*-- GPIO Configuration ------------------------------------------------------*/
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/*!< NOR Data lines configuration */
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_8 | GPIO_Pin_9 |
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GPIO_Pin_10 | GPIO_Pin_14 | GPIO_Pin_15;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_Init(GPIOD, &GPIO_InitStructure);
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 |
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GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 |
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GPIO_Pin_14 | GPIO_Pin_15;
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GPIO_Init(GPIOE, &GPIO_InitStructure);
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/*!< NOR Address lines configuration */
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 |
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GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_12 | GPIO_Pin_13 |
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GPIO_Pin_14 | GPIO_Pin_15;
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GPIO_Init(GPIOF, &GPIO_InitStructure);
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 |
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GPIO_Pin_3 | GPIO_Pin_4 | GPIO_Pin_5;
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GPIO_Init(GPIOG, &GPIO_InitStructure);
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13;
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GPIO_Init(GPIOD, &GPIO_InitStructure);
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3 | GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_6;
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GPIO_Init(GPIOE, &GPIO_InitStructure);
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/*!< NOE and NWE configuration */
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4 | GPIO_Pin_5;
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GPIO_Init(GPIOD, &GPIO_InitStructure);
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/*!< NE2 configuration */
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9;
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GPIO_Init(GPIOG, &GPIO_InitStructure);
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/*!< Configure PD6 for NOR memory Ready/Busy signal */
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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GPIO_Init(GPIOD, &GPIO_InitStructure);
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/*-- FSMC Configuration ----------------------------------------------------*/
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p.FSMC_AddressSetupTime = 0x02; //µØÖ·½¨Á¢Ê±¼ä
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p.FSMC_AddressHoldTime = 0x00; //µØÖ·±£³Öʱ¼ä
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p.FSMC_DataSetupTime = 0x05; //Êý¾Ý½¨Á¢Ê±¼ä
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p.FSMC_BusTurnAroundDuration = //×ÜÏ߻ָ´Ê±¼äx000x00;
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p.FSMC_CLKDivision = 0x00; // ʱÖÓ·ÖƵÒò×Ó
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p.FSMC_DataLatency = 0x00; //Êý¾Ý²úÉúʱ¼ä
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p.FSMC_AccessMode = FSMC_AccessMode_B;//FSMC NOR¿ØÖÆÆ÷ʱÐò
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FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM2; //ʹÓÃÁËFSMCµÄBANK1µÄ×Ó°å¿é2
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FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable; //½ûÖ¹µØÖ·Êý¾ÝÏ߸´ÓÃ
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FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_NOR; //´æ´¢Æ÷ÀàÐÍΪNor
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FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b; //´æ´¢Æ÷Êý¾Ý¿í¶ÈΪ16λ
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FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable; //¹Ø±ÕÍ»·¢Ä£Ê½·ÃÎÊ
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FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable; //¹Ø±ÕÒì²½µÈ´ý
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FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low; //µÈ´ýÐźÅÓÅÏȼ¶£¬Ö»ÓÐÔÚʹÄÜÍ»·¢·ÃÎÊģʽ²ÅÓÐЧ
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FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable; //¹Ø±ÕWrapped burst access mode£¬Ö»ÓÐÔÚʹÄÜÍ»·¢·ÃÎÊģʽ²ÅÓÐЧ
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FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState; //µÈ´ýÐźÅÉèÖã¬Ö»ÓÐÔÚʹÄÜÍ»·¢·ÃÎÊģʽ²ÅÓÐЧ
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FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable; //ʹÄÜÕâ¸öBANKµÄд²Ù×÷
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FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable; //ʹÄÜ/¹Ø±ÕµÈ´ýÐÅÏ¢ÉèÖã¬Ö»ÔÚʹÄÜÍ»·¢·ÃÎÊģʽ²ÅÓÐЧ
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FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable; //¹Ø±ÕExtend Mode
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FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable; //¹Ø±ÕWrite Burst Mode
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FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p; //¶Á²Ù×÷ʱÐò²ÎÊý
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FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p; //д²Ù×÷ʱÐò²ÎÊý
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FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);
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/*!< Enable FSMC Bank1_NOR Bank */
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/*--------------ʹÄÜBANK1µÄ×Ó°å¿é2------------------------------*/
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FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM2, ENABLE);
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}
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/**
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* @brief Reads NOR memory's Manufacturer and Device Code.
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* @param NOR_ID: pointer to a NOR_IDTypeDef structure which will hold the
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* Manufacturer and Device Code.
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* @retval None
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*/
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void NOR_ReadID(NOR_IDTypeDef* NOR_ID)
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{
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#ifdef NOR_S29GL512P90
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NOR_WRITE(ADDR_SHIFT(0x0555), 0x00AA);
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NOR_WRITE(ADDR_SHIFT(0x02AA), 0x0055);
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NOR_WRITE(ADDR_SHIFT(0x0555), 0x0090);
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#else
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NOR_WRITE(ADDR_SHIFT(0x05555), 0x00AA);
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NOR_WRITE(ADDR_SHIFT(0x02AAA), 0x0055);
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NOR_WRITE(ADDR_SHIFT(0x05555), 0x0090);
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#endif
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NOR_ID->Manufacturer_Code = *(__IO uint16_t *) ADDR_SHIFT(0x0000);
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NOR_ID->Device_Code1 = *(__IO uint16_t *) ADDR_SHIFT(0x0001);
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NOR_ID->Device_Code2 = *(__IO uint16_t *) ADDR_SHIFT(0x000E);
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NOR_ID->Device_Code3 = *(__IO uint16_t *) ADDR_SHIFT(0x000F);
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NOR_ID->Secure_Device_Verify = *(__IO uint16_t *) ADDR_SHIFT(0x0003);
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NOR_ID->Sector_Protect_Verify = *(__IO uint16_t *) ADDR_SHIFT(0x0002);
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}
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/**
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* @brief Erases the specified Nor memory block.
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* @param BlockAddr: address of the block to erase.
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* @retval NOR_Status: The returned value can be: NOR_SUCCESS, NOR_ERROR
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* or NOR_TIMEOUT
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*/
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NOR_Status NOR_EraseBlock(uint32_t BlockAddr)
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{
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#ifdef NOR_S29GL512P90
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NOR_WRITE(ADDR_SHIFT(0x0555), 0x00AA);
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NOR_WRITE(ADDR_SHIFT(0x02AA), 0x0055);
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NOR_WRITE(ADDR_SHIFT(0x0555), 0x0080);
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NOR_WRITE(ADDR_SHIFT(0x0555), 0x00AA);
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NOR_WRITE(ADDR_SHIFT(0x02AA), 0x0055);
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#else
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NOR_WRITE(ADDR_SHIFT(0x05555), 0x00AA);
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NOR_WRITE(ADDR_SHIFT(0x02AAA), 0x0055);
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NOR_WRITE(ADDR_SHIFT(0x05555), 0x0080);
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NOR_WRITE(ADDR_SHIFT(0x05555), 0x00AA);
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NOR_WRITE(ADDR_SHIFT(0x02AAA), 0x0055);
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#endif
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NOR_WRITE((Bank1_NOR2_ADDR + BlockAddr), 0x30);
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return (NOR_GetStatus(BlockErase_Timeout));
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}
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/**
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* @brief Erases the entire chip.
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* @param None
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* @retval NOR_Status: The returned value can be: NOR_SUCCESS, NOR_ERROR
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* or NOR_TIMEOUT
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*/
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NOR_Status NOR_EraseChip(void)
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{
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#ifdef NOR_S29GL512P90
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NOR_WRITE(ADDR_SHIFT(0x0555), 0x00AA);
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NOR_WRITE(ADDR_SHIFT(0x02AA), 0x0055);
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NOR_WRITE(ADDR_SHIFT(0x0555), 0x0080);
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NOR_WRITE(ADDR_SHIFT(0x0555), 0x00AA);
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NOR_WRITE(ADDR_SHIFT(0x02AA), 0x0055);
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NOR_WRITE(ADDR_SHIFT(0x0555), 0x0010);
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#else
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NOR_WRITE(ADDR_SHIFT(0x05555), 0x00AA);
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NOR_WRITE(ADDR_SHIFT(0x02AAA), 0x0055);
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NOR_WRITE(ADDR_SHIFT(0x05555), 0x0080);
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NOR_WRITE(ADDR_SHIFT(0x05555), 0x00AA);
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NOR_WRITE(ADDR_SHIFT(0x02AAA), 0x0055);
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NOR_WRITE(ADDR_SHIFT(0x05555), 0x0010);
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#endif
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return (NOR_GetStatus(ChipErase_Timeout));
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}
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/**
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* @brief Writes a half-word to the NOR memory.
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* @param WriteAddr: NOR memory internal address to write to.
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* @param Data: Data to write.
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* @retval NOR_Status: The returned value can be: NOR_SUCCESS, NOR_ERROR
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* or NOR_TIMEOUT
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*/
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NOR_Status NOR_WriteHalfWord(uint32_t WriteAddr, uint16_t Data)
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{
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#ifdef NOR_S29GL512P90
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NOR_WRITE(ADDR_SHIFT(0x0555), 0x00AA);
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NOR_WRITE(ADDR_SHIFT(0x02AA), 0x0055);
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NOR_WRITE(ADDR_SHIFT(0x0555), 0x00A0);
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#else
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NOR_WRITE(ADDR_SHIFT(0x05555), 0x00AA);
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NOR_WRITE(ADDR_SHIFT(0x02AAA), 0x0055);
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NOR_WRITE(ADDR_SHIFT(0x05555), 0x00A0);
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#endif
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NOR_WRITE((Bank1_NOR2_ADDR + WriteAddr), Data);
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return (NOR_GetStatus(Program_Timeout));
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}
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/**
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* @brief Writes a half-word buffer to the FSMC NOR memory.
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* @param pBuffer: pointer to buffer.
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* @param WriteAddr: NOR memory internal address from which the data will be
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* written.
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* @param NumHalfwordToWrite: number of Half words to write.
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* @retval NOR_Status: The returned value can be: NOR_SUCCESS, NOR_ERROR
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* or NOR_TIMEOUT
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*/
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NOR_Status NOR_WriteBuffer(uint16_t* pBuffer, uint32_t WriteAddr, uint32_t NumHalfwordToWrite)
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{
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NOR_Status status = NOR_ONGOING;
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do
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{
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/*!< Transfer data to the memory */
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status = NOR_WriteHalfWord(WriteAddr, *pBuffer++);
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WriteAddr = WriteAddr + 2;
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NumHalfwordToWrite--;
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}
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while((status == NOR_SUCCESS) && (NumHalfwordToWrite != 0));
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return (status);
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}
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/**
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* @brief Writes a half-word buffer to the FSMC NOR memory. This function
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* must be used only with S29GL128P NOR memory.
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* @param pBuffer: pointer to buffer.
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* @param WriteAddr: NOR memory internal address from which the data will be
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* written.
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* @param NumHalfwordToWrite: number of Half words to write.
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* The maximum allowed value is 32 Half words (64 bytes).
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* @retval NOR_Status: The returned value can be: NOR_SUCCESS, NOR_ERROR
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* or NOR_TIMEOUT
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*/
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NOR_Status NOR_ProgramBuffer(uint16_t* pBuffer, uint32_t WriteAddr, uint32_t NumHalfwordToWrite)
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{
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uint32_t lastloadedaddress = 0x00;
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uint32_t currentaddress = 0x00;
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uint32_t endaddress = 0x00;
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/*!< Initialize variables */
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currentaddress = WriteAddr;
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endaddress = WriteAddr + NumHalfwordToWrite - 1;
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lastloadedaddress = WriteAddr;
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/*!< Issue unlock command sequence */
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#ifdef NOR_S29GL512P90
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NOR_WRITE(ADDR_SHIFT(0x00555), 0x00AA);
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NOR_WRITE(ADDR_SHIFT(0x02AA), 0x0055);
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#else
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NOR_WRITE(ADDR_SHIFT(0x005555), 0x00AA);
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NOR_WRITE(ADDR_SHIFT(0x02AAA), 0x0055);
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#endif
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/*!< Write Write Buffer Load Command */
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NOR_WRITE(ADDR_SHIFT(WriteAddr), 0x0025);
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NOR_WRITE(ADDR_SHIFT(WriteAddr), (NumHalfwordToWrite - 1));
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/*!< Load Data into NOR Buffer */
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while(currentaddress <= endaddress)
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{
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/*!< Store last loaded address & data value (for polling) */
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lastloadedaddress = currentaddress;
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NOR_WRITE(ADDR_SHIFT(currentaddress), *pBuffer++);
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currentaddress += 1;
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}
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NOR_WRITE(ADDR_SHIFT(lastloadedaddress), 0x29);
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return(NOR_GetStatus(Program_Timeout));
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}
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/**
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* @brief Reads a half-word from the NOR memory.
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* @param ReadAddr: NOR memory internal address to read from.
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* @retval Half-word read from the NOR memory
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*/
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uint16_t NOR_ReadHalfWord(uint32_t ReadAddr)
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{
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#ifdef NOR_S29GL512P90
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NOR_WRITE(ADDR_SHIFT(0x00555), 0x00AA);
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NOR_WRITE(ADDR_SHIFT(0x002AA), 0x0055);
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#else
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NOR_WRITE(ADDR_SHIFT(0x005555), 0x00AA);
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NOR_WRITE(ADDR_SHIFT(0x002AAA), 0x0055);
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#endif
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NOR_WRITE((Bank1_NOR2_ADDR + ReadAddr), 0x00F0 );
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return (*(__IO uint16_t *)((Bank1_NOR2_ADDR + ReadAddr)));
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}
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/**
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* @brief Reads a block of data from the FSMC NOR memory.
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* @param pBuffer: pointer to the buffer that receives the data read from the
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* NOR memory.
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* @param ReadAddr: NOR memory internal address to read from.
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* @param NumHalfwordToRead : number of Half word to read.
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* @retval None
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*/
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void NOR_ReadBuffer(uint16_t* pBuffer, uint32_t ReadAddr, uint32_t NumHalfwordToRead)
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{
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#ifdef NOR_S29GL512P90
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NOR_WRITE(ADDR_SHIFT(0x0555), 0x00AA);
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NOR_WRITE(ADDR_SHIFT(0x02AA), 0x0055);
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#else
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NOR_WRITE(ADDR_SHIFT(0x005555), 0x00AA);
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NOR_WRITE(ADDR_SHIFT(0x002AAA), 0x0055);
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#endif
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NOR_WRITE((Bank1_NOR2_ADDR + ReadAddr), 0x00F0);
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for(; NumHalfwordToRead != 0x00; NumHalfwordToRead--) /*!< while there is data to read */
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{
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/*!< Read a Halfword from the NOR */
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*pBuffer++ = *(__IO uint16_t *)((Bank1_NOR2_ADDR + ReadAddr));
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ReadAddr = ReadAddr + 2;
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}
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}
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/**
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* @brief Returns the NOR memory to Read mode.
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* @param None
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* @retval NOR_SUCCESS
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*/
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NOR_Status NOR_ReturnToReadMode(void)
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{
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NOR_WRITE(Bank1_NOR2_ADDR, 0x00F0);
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return (NOR_SUCCESS);
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}
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/**
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* @brief Returns the NOR memory to Read mode and resets the errors in the NOR
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* memory Status Register.
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* @param None
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* @retval NOR_SUCCESS
|
*/
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NOR_Status NOR_Reset(void)
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{
|
#ifdef NOR_S29GL512P90
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NOR_WRITE(ADDR_SHIFT(0x00555), 0x00AA);
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NOR_WRITE(ADDR_SHIFT(0x002AA), 0x0055);
|
#else
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NOR_WRITE(ADDR_SHIFT(0x005555), 0x00AA);
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NOR_WRITE(ADDR_SHIFT(0x002AAA), 0x0055);
|
#endif
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NOR_WRITE(Bank1_NOR2_ADDR, 0x00F0);
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return (NOR_SUCCESS);
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}
|
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/**
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* @brief Returns the NOR operation status.
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* @param Timeout: NOR progamming Timeout
|
* @retval NOR_Status: The returned value can be: NOR_SUCCESS, NOR_ERROR
|
* or NOR_TIMEOUT
|
*/
|
NOR_Status NOR_GetStatus(uint32_t Timeout)
|
{
|
uint16_t val1 = 0x00, val2 = 0x00;
|
NOR_Status status = NOR_ONGOING;
|
uint32_t timeout = Timeout;
|
|
/*!< Poll on NOR memory Ready/Busy signal ----------------------------------*/
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while((GPIO_ReadInputDataBit(GPIOD, GPIO_Pin_6) != RESET) && (timeout > 0))
|
{
|
timeout--;
|
}
|
|
timeout = Timeout;
|
|
while((GPIO_ReadInputDataBit(GPIOD, GPIO_Pin_6) == RESET) && (timeout > 0))
|
{
|
timeout--;
|
}
|
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/*!< Get the NOR memory operation status -----------------------------------*/
|
while((Timeout != 0x00) && (status != NOR_SUCCESS))
|
{
|
Timeout--;
|
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/*!< Read DQ6 and DQ5 */
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val1 = *(__IO uint16_t *)(Bank1_NOR2_ADDR);
|
val2 = *(__IO uint16_t *)(Bank1_NOR2_ADDR);
|
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/*!< If DQ6 did not toggle between the two reads then return NOR_Success */
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if((val1 & 0x0040) == (val2 & 0x0040))
|
{
|
return NOR_SUCCESS;
|
}
|
|
if((val1 & 0x0020) != 0x0020)
|
{
|
status = NOR_ONGOING;
|
}
|
|
val1 = *(__IO uint16_t *)(Bank1_NOR2_ADDR);
|
val2 = *(__IO uint16_t *)(Bank1_NOR2_ADDR);
|
|
if((val1 & 0x0040) == (val2 & 0x0040))
|
{
|
return NOR_SUCCESS;
|
}
|
else if((val1 & 0x0020) == 0x0020)
|
{
|
return NOR_ERROR;
|
}
|
}
|
|
if(Timeout == 0x00)
|
{
|
status = NOR_TIMEOUT;
|
}
|
|
/*!< Return the operation status */
|
return (status);
|
}
|
|
/**
|
* @}
|
*/
|
|
/**
|
* @}
|
*/
|
|
/**
|
* @}
|
*/
|
|
/**
|
* @}
|
*/
|
|
/**
|
* @}
|
*/
|
|
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
