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| | | /* Select a low-speed clock source */ |
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| | | // <o> Low-Speed Clock <0=> RCL <1=> XTL <2=> ACT32K |
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| | | #define CONFIG_LOW_SPEED_CLOCK_SRC 2 |
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| | | #define CONFIG_LOW_SPEED_CLOCK_SRC 1 |
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| | | // <i> Select a low-speed clock source |
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| | | |
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| | | /* CENTRAL maximum number of states supported */ |
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| | | // <h> Low Power Config |
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| | | /* low power enable */ |
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| | | // <q> Low Power Enable |
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| | | #define CONFIG_PM 0 |
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| | | #define CONFIG_PM 1 |
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| | | // <i> low power enable |
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| | | |
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| | | // <q> Keep Flash Power in Low Power Mode |
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| | | #define CONFIG_KEEP_FLASH_POWER_IN_LP_MODE 0 |
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| | | #define CONFIG_KEEP_FLASH_POWER_IN_LP_MODE 1 |
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| | | // <i> Select this means flash power would be retained in Low Power Mode, and |
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| | | // <i> there would be a little avg-current increase (about 1uA). The benefit is that |
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| | | // <i> the large peak current (>15mA) would not occur. |
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