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| | | * @Name: Vender specific commands |
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| | | * @{ |
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| | | */ |
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| | | /* HCI Vendor[PanChip] OCF Group */ |
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| | | #define HCI_OCF_VS_GRP_PROPRIETARY_RADIO 0x00 |
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| | | #define HCI_OCF_VS_GRP_MODEM 0x01 |
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| | | #define HCI_OCF_VS_GRP_PCTE 0x02 |
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| | | #define HCI_OCF_VS_GRP_DEBUG 0x0F |
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| | | |
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| | | /* HCI Vendor OCF for Proprietary Radio Commands */ |
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| | | #define HCI_OCF_VS_PROPRIETARY_RADIO_RESET 0x00 |
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| | | #define HCI_OCF_VS_PROPRIETARY_RADIO_INIT 0x01 |
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| | | #define HCI_OCF_VS_PROPRIETARY_RADIO_SET_DATA 0x02 |
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| | | #define HCI_OCF_VS_PROPRIETARY_RADIO_TRANSMIT 0x03 |
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| | | #define HCI_OCF_VS_PROPRIETARY_RADIO_TRANSMIT_ENHANCED 0x04 |
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| | | #define HCI_OCF_VS_PROPRIETARY_RADIO_RECEIVE 0x05 |
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| | | #define HCI_OCF_VS_PROPRIETARY_RADIO_RECEIVE_ENHANCED 0x06 |
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| | | #define HCI_OCF_VS_PROPRIETARY_RADIO_TRANSMIT_TEST 0x07 |
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| | | #define HCI_OCF_VS_PROPRIETARY_RADIO_RECEIVE_TEST 0x08 |
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| | | #define HCI_OCF_VS_PROPRIETARY_RADIO_RX_GOON 0x09 |
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| | | #define HCI_OCF_VS_PROPRIETARY_RADIO_SET_DEV 0x0A |
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| | | #define HCI_OCF_VS_PROPRIETARY_RADIO_ADDR_MATCH_BIT 0x0B |
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| | | #define HCI_OCF_VS_PROPRIETARY_RADIO_SET_PAYLOAD_ENDIAN 0x0C |
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| | | #define HCI_OCF_VS_PROPRIETARY_RADIO_SET_ACK_PAYLOAD 0x0D |
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| | | #define HCI_OCF_VS_PROPRIETARY_RADIO_IRQ_MASK 0x0E |
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| | | #define HCI_OCF_VS_PROPRIETARY_RADIO_MULTI_PREAMBLE 0x0F |
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| | | #define HCI_OCF_VS_PROPRIETARY_RADIO_RX_STOP 0x10 |
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| | | |
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| | | /* HCI Vendor OCF for Modem Commands */ |
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| | | #define HCI_OCF_VS_MODEM_SPI_PHY_CFG 0x00 |
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| | | |
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| | | /* HCI Vendor OCF for Panchip Constant Tone Extension Commands */ |
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| | | #define HCI_OCF_VS_PCTE_SET_IQ_SAMPLES 0x00 |
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| | | #define HCI_OCF_VS_PCTE_SET_PARAMS 0x01 |
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| | | #define HCI_OCF_VS_PCTE_SET_ADV_ENABLE 0x02 |
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| | | #define HCI_OCF_VS_PCTE_SET_SCAN_ENABLE 0x03 |
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| | | |
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| | | /* HCI Vendor OCF for Debug */ |
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| | | #define HCI_OCF_VS_SET_BD_ADDR 0x00 |
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| | | #define HCI_OCF_VS_CHECK_LEAK 0x01 |
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| | | #define HCI_OCF_VS_RELEASE_VERSION 0x02 |
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| | | #define HCI_OCF_VS_SET_TX_POWER 0x03 |
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| | | #define HCI_OCF_VS_DEBUG_READ_REG 0x07 |
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| | | #define HCI_OCF_VS_DEBUG_WRITE_REG 0x08 |
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| | | #define HCI_OCF_VS_DEBUG_PHY 0x09 |
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| | | #define HCI_OCF_VS_DEBUG_READ_RSSI_GAIN 0x0A |
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| | | #define HCI_OCF_VS_DEBUG_CONSTANT_TONE_V1 0x0B |
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| | | #define HCI_OCF_VS_DEBUG_CONSTANT_TONE_V2 0x0C |
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| | | #define HCI_OCF_VS_DEBUG_REG_RW 0x0D |
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| | | #define HCI_OCF_VS_DEBUG_SET_PHY_FREQ 0x0E |
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| | | #define HCI_OCF_VS_DEBUG_LE_RECEIVER_TEST 0x0F |
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| | | #define HCI_OCF_VS_DEBUG_LE_TRANSMITTER_TEST 0x10 |
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| | | #define HCI_OCF_VS_DEBUG_SET_LE_TRANSMITTER_PARAMS 0x11 |
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| | | #define HCI_OCF_VS_DEBUG_SLEEP_ENTER 0x12 |
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| | | #define HCI_OCF_VS_DEBUG_POWER_MODE 0x13 |
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| | | #define HCI_OCF_VS_SET_TX_POWER_V2 0x14 |
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| | | |
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| | | /* XiaoMi DFU */ |
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| | | #define HCI_OCF_VS_START_DFU 0x0300 |
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| | | #define HCI_OCF_VS_END_DFU 0x0301 |
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| | | #define HCI_OCF_VS_FW_DATA 0x0302 |
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| | | |
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| | | #define HCI_OCF_VS_SET_BD_ADDR 0x03C0 |
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| | | #define HCI_OCF_VS_SET_TX_POWER 0x03C3 |
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| | | //#define HCI_OCF_VS_SET_BD_ADDR 0x03C0 |
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| | | //#define HCI_OCF_VS_SET_TX_POWER 0x03C3 |
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| | | /**@}**/ |
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| | | #define HCI_OPCODE(ogf, ocf) (((ogf) << 10) + (ocf)) |
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| | | #define HCI_OGF(opcode) ((opcode) >> 10) |
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| | | #define HCI_OCF(opcode) ((opcode) & 0x03FF) |
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| | | |
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| | | /* Specific for PanChip */ |
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| | | #define HCI_OCF_VS_GRP(opcode) (HCI_OCF(opcode) >> 6) |
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| | | #define HCI_OCF_VS(grp, ocf) (uint16_t)((grp<<6)|(ocf)) |
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| | | #define HCI_OPCODE_VS(ogf, grp, ocf) HCI_OPCODE(ogf, HCI_OCF_VS(grp, ocf)) |
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| | | /**@}*/ |
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