BLE_PAN1070.git

			@@ -32,24 +32,15 @@
			#define LP_EXT_P56_WK_EDGE_HIGH (1) /!< Gpio p56 wake up by rising edge /
			/*@} /

			/**@defgroup LP_WK_SOURCE_FLAG Lowpower wakeup source select
			* @brief Lowpower wakeup source select definitions
			* @{ */
			#define LP_WKUP_MODE_SEL_EXT_GPIO (0)
			#define LP_WKUP_MODE_SEL_32K (1)
			#define LP_WKUP_MODE_SEL_GPIO (2)
			#define LP_WKUP_MODE_SEL_WDT (3)
			#define LP_WKUP_MODE_SEL_TIMER (4)
			#define LP_WKUP_MODE_SEL_BOD (5)
			#define LP_WKUP_MODE_SEL_LVR (6)
			/*@} /
			#define LP_SLPTMR_CH0 (0)
			#define LP_SLPTMR_CH1 (1)
			#define LP_SLPTMR_CH2 (2)

			#define LP_MODE_SEL_SLEEP_MODE (0)
			#define LP_MODE_SEL_DEEPSLEEP_MODE (1)
			#define LP_MODE_SEL_STANDBY_M1_MODE (2)
			#define LP_MODE_SEL_STANDBY_M0_MODE (3)

			#define LP_DEEPSLEEP_MODE_SEL LP_DEEPSLEEP_MODE1
			#define LP_DEEPSLEEP_MODE1 (1)
			#define LP_DEEPSLEEP_MODE2 (2)
			#define LP_DEEPSLEEP_MODE3 (3)
			@@ -58,6 +49,17 @@
			#define LP_STANDBY_M1_MODE1 (1)
			#define LP_STANDBY_M1_MODE2 (2)
			#define LP_STANDBY_M1_MODE3 (3)

			#define LP_STBM1_WAKEUP_SRC_GPIO BIT0
			#define LP_STBM1_WAKEUP_SRC_SLPTMR BIT1

			#define LP_RETENTION_SRAM_NONE (0)
			#define LP_RETENTION_SRAM_BLOCK0 BIT0 /* 32 KB */
			#define LP_RETENTION_SRAM_BLOCK1 BIT1 /* 16 KB */
			#define LP_RETENTION_SRAM_DECRYPT BIT2 /* 256 B */
			#define LP_RETENTION_SRAM_PHY_REGS BIT3 /* 256 B PHY SEQ RAM + PHY Registers */
			#define LP_RETENTION_SRAM_LL BIT4 /* 8 KB */
			#define LP_RETENTION_SRAM_ALL (BIT0 \| BIT1 \| BIT2 \| BIT3 \| BIT4)

			/**
			* @brief This function enable lowpower intterrupt
			@@ -113,12 +115,20 @@
			*/
			void LP_SetExternalWake(ANA_T *ana,uint8_t WkEdge);
			/**
			* @brief This function set sleep time
			* @param[in] ana: where ana is analog module base address
			* @param[in] u32ClkCnt: where u32ClkCnt is 32k clock cnt num
			* @return none
			*/
			* @brief This function set sleep time
			* @param[in] ana: where ana is analog module
			* @param[in] u32ClkCnt: where u32ClkCnt is 32k clock cnt num
			* @param[in] idx: channel index of sleeptimer, can be 0, 1, 2
			* @return none
			*/
			void LP_SetSleepTime(ANA_T *ana,uint32_t u32ClkCnt,uint8_t idx);

			/**
			* @brief This function get current 32K timer counter
			* @param[in] ana: where ana is analog module
			* @return Current 32K timer counter
			*/
			uint32_t LP_GetSlptmrCurrCount(ANA_T *ana);

			/**
			* @brief This function sets the LPLDOH (Low-Power Low-Dropout Regulator) delay count using 32kHz clock cycles.
			@@ -141,54 +151,55 @@
			* @return None
			*/
			void LP_SetSleepMode(ANA_T *ana,uint8_t mode);


			/**
			* @brief This function set sleep mode config
			* @param[in] ana: where ana is analog module base address
			* @param[in] wkMode: where wkMode determine which wakeup mode to choose
			* @param[in] enterCyclically: where enterCyclically determine
			* whether to cycle into low power
			* @return none
			*/
			void LP_SetSleepModeConfig(ANA_T *ana,uint32_t wkMode,bool enterCyclically);
			* @brief This function reads single register value from phy module.
			* @param[in] reg_addr: phy register address
			* @return register value
			*/
			uint32_t PHY_SingleRegRead(uint32_t reg_addr);

			/**
			* @brief This function writes single register value to phy module.
			* @param[in] reg_addr: phy register address
			* @param[in] reg_addr: register value to write
			* @return None
			*/
			void PHY_SingleRegWrite(uint32_t reg_addr, uint32_t reg_val);

			/**
			* @brief This function set sleep mode config
			* @param[in] ana: Select analog module
			* @param[in] enterCyclically: Enable ARM Sleep-On-Exit Feature or not
			* @return none
			*/
			void LP_EnterSleepMode(ANA_T *ana, bool enterCyclically);

			/**
			* @brief This function sets the deep sleep mode configuration.
			* @param[in] ana: Analog module base address
			* @param[in] wkMode: Wakeup mode selection
			* @param[in] enterCyclically: Determines whether to cycle into low power
			* @param[in] PowerCtrl: Power control configuration
			* @param[in] dp_mode: Deep sleep mode configuration
			* @param[in] powerCtrl: Power control configuration
			* @param[in] dpMode: Deep sleep mode configuration
			* @return None
			*/
			void LP_EnterDeepSleepMode(ANA_T *ana, bool enterCyclically, uint8_t powerCtrl, uint8_t dpMode);

			void LP_SetDeepSleepConfig(ANA_T *ana,
			uint32_t wkMode,
			bool enterCyclically,
			uint8_t PowerCtrl,
			uint8_t dp_mode);
			/**
			* @brief This function sets the Standby Mode 0 configuration.
			*/
			void LP_SetStandbyMode0Config(void);
			/**
			* @brief This function sets the Standby Mode 0 configuration with BOD and LVR.
			*/
			void LP_SetStandbyMode0BodLvrConfig(void);
			/**
			* @brief This function sets the Standby Mode 1 configuration.
			* @param[in] ana: Analog module base address
			* @param[in] wkMode: Wakeup mode selection
			* @param[in] PowerCtrl: Power control configuration
			* @param[in] slpTimer: Sleep timer value
			* @param[in] spaceIdx: Space index
			* @param[in] stdy_mode: Standby mode configuration
			* @param[in] powerCtrl: Power control of SRAMS in lp mode
			* @param[in] wakeupWithoutReset: Do not reset (continue run) after waking up
			*/
			void LP_SetStandbyMode1Config(ANA_T *ana,
			uint32_t wkMode,
			uint8_t PowerCtrl,
			uint32_t slpTimer,
			uint8_t spaceIdx,
			uint8_t stdy_mode);
			void LP_EnterStandbyMode1(ANA_T *ana, uint8_t powerCtrl, bool wakeupWithoutReset);

			/**
			* @brief This function sets the Standby Mode 0 configuration.
			* @param[in] ana: Analog module base address
			* @param[in] enableClk32k: Enable 32K low speed clock in lp mode for special purpose, such as BOD/LVD wakeup
			*/
			void LP_EnterStandbyMode0(ANA_T *ana, bool enableClk32k);

			/*@} /
			#ifdef __cplusplus
			}