| | |
| | | .TransferType = DMAC_TransferType_Per2Mem, |
| | | // Destination config (Memory) |
| | | .AddrChangeDst = DMAC_AddrChange_Increment, |
| | | .BurstLenDst = DMAC_BurstLen_4, |
| | | .DataWidthDst = DMAC_DataWidth_32, |
| | | .BurstLenDst = DMAC_BurstLen_8, |
| | | .DataWidthDst = DMAC_DataWidth_8, |
| | | .HandshakeDst = DMAC_Handshake_Default, |
| | | // Source config (Peripheral) |
| | | .AddrChangeSrc = DMAC_AddrChange_NoChange, |
| | |
| | | /*set tx dma channel control&config register*/ |
| | | .AddrChangeDst = DMAC_AddrChange_NoChange, |
| | | .AddrChangeSrc = DMAC_AddrChange_Increment, |
| | | .BurstLenDst = DMAC_BurstLen_4, |
| | | .BurstLenSrc = DMAC_BurstLen_4, |
| | | .BurstLenDst = DMAC_BurstLen_1, |
| | | .BurstLenSrc = DMAC_BurstLen_1, |
| | | .DataWidthDst = DMAC_DataWidth_8, |
| | | // .DataWidthDst = DMAC_DataWidth_16, |
| | | .DataWidthSrc = DMAC_DataWidth_32, |
| | | .DataWidthSrc = DMAC_DataWidth_8, |
| | | .TransferType = DMAC_TransferType_Mem2Per, |
| | | .FlowControl = DMAC_FlowControl_DMA, |
| | | .HandshakeDst = DMAC_Handshake_Hardware, |
| | |
| | | /*set tx dma channel control&config register*/ |
| | | .AddrChangeDst = DMAC_AddrChange_NoChange, |
| | | .AddrChangeSrc = DMAC_AddrChange_Increment, |
| | | .BurstLenDst = DMAC_BurstLen_4, |
| | | .BurstLenSrc = DMAC_BurstLen_4, |
| | | //.DataWidthDst = DMAC_DataWidth_8, |
| | | .BurstLenDst = DMAC_BurstLen_1, |
| | | .BurstLenSrc = DMAC_BurstLen_1, |
| | | .DataWidthDst = DMAC_DataWidth_16, |
| | | .DataWidthSrc = DMAC_DataWidth_32, |
| | | .DataWidthSrc = DMAC_DataWidth_16, |
| | | .TransferType = DMAC_TransferType_Mem2Per, |
| | | .FlowControl = DMAC_FlowControl_DMA, |
| | | .HandshakeDst = DMAC_Handshake_Hardware, |
| | |
| | | .AddrChangeSrc = DMAC_AddrChange_NoChange, |
| | | .BurstLenDst = DMAC_BurstLen_4, |
| | | .BurstLenSrc = DMAC_BurstLen_4, |
| | | //.DataWidthDst = DMAC_DataWidth_8, |
| | | .DataWidthDst = DMAC_DataWidth_32, |
| | | .DataWidthDst = DMAC_DataWidth_8, |
| | | .DataWidthSrc = DMAC_DataWidth_8, |
| | | .TransferType = DMAC_TransferType_Per2Mem, |
| | | .FlowControl = DMAC_FlowControl_DMA, |
| | |
| | | NVIC_EnableIRQ(DMA_IRQn); |
| | | } |
| | | |
| | | void DMA_IRQHandler(void) |
| | | __WEAK void DMA_IRQHandlerOverlay(void) |
| | | { |
| | | int16_t remaind_cnt; |
| | | |
| | | /* Handle DMA Transfer Complete Interrupt */ |
| | | if (DMAC_CombinedIntStatus(DMA, DMAC_FLAG_MASK_TFR)) |
| | | { |
| | | for (int i = 0; i < 3; i++) |
| | | for (int i = 0; i < DMAC_CHANNEL_NUMS; i++) |
| | | { |
| | | if (DMAC_IntFlag(DMA, i, DMAC_FLAG_INDEX_TFR)) |
| | | { |
| | | DMAC_Channel_Array[i].XferFlag = true; |
| | | DMAC_ClrIntFlag(DMA, i, DMAC_FLAG_INDEX_TFR); |
| | | |
| | | // DMAC_Channel_Array[i].StopFlag =true; |
| | | /* Release DMA Rx channel */ |
| | | DMAC_ReleaseChannel(DMA, i); |
| | | |
| | | switch (DMAC_Channel_Array[i].PeriMode) |
| | | { |
| | | case DMAC_Peri_UART: |
| | | if (DMAC_Channel_Array[i].CallbackUart != NULL) |
| | | DMAC_Channel_Array[i].XferCount += DMAC_GetXferredBlockCount(DMA, i); |
| | | remaind_cnt = DMAC_Channel_Array[i].XferSize - DMAC_Channel_Array[i].XferCount; |
| | | if (remaind_cnt > 0) |
| | | { |
| | | DMAC_Channel_Array[i].CallbackUart(UART_CB_FLAG_DMA, (uint8_t *)DMAC_Channel_Array[i].pBuffPtr, |
| | | DMAC_Channel_Array[i].XferSize); |
| | | if (remaind_cnt < 1024) |
| | | { |
| | | DMAC_ContinueChannel(DMA, i, remaind_cnt); |
| | | } |
| | | else |
| | | { |
| | | DMAC_ContinueChannel(DMA, i, 1023); |
| | | } |
| | | } |
| | | else |
| | | { |
| | | if (DMAC_Channel_Array[i].CallbackUart != NULL) |
| | | { |
| | | if (DMAC_Channel_Array[i].ConfigTmp.TransferType == DMAC_TransferType_Per2Mem) |
| | | { |
| | | ((HAL_UART_HandleTypeDef*)DMAC_Channel_Array[i].periph)->isRxBusy = false; |
| | | } |
| | | else if (DMAC_Channel_Array[i].ConfigTmp.TransferType == DMAC_TransferType_Mem2Per) |
| | | { |
| | | ((HAL_UART_HandleTypeDef*)DMAC_Channel_Array[i].periph)->isTxBusy = false; |
| | | } |
| | | DMAC_Channel_Array[i].CallbackUart(UART_CB_FLAG_DMA, (uint8_t *)DMAC_Channel_Array[i].pBuffPtr, |
| | | DMAC_Channel_Array[i].XferCount); |
| | | } |
| | | } |
| | | break; |
| | | case DMAC_Peri_I2C: |
| | | DMAC_ReleaseChannel(DMA, i); |
| | | if (DMAC_Channel_Array[i].CallbackI2c != NULL) |
| | | { |
| | | DMAC_Channel_Array[i].CallbackI2c(I2C_CB_FLAG_DMA, (uint8_t *)DMAC_Channel_Array[i].pBuffPtr, |
| | | DMAC_Channel_Array[i].XferSize); |
| | | } |
| | | case DMAC_Peri_ADC: |
| | | if (DMAC_Channel_Array[i].CallbackAdc!= NULL) |
| | | { |
| | | DMAC_Channel_Array[i].CallbackAdc(ADC_CB_FLAG_DMA, DMAC_Channel_Array[i].pBuffPtr, |
| | | DMAC_Channel_Array[i].XferSize); |
| | | } |
| | | case DMAC_Peri_SPI: |
| | | DMAC_ReleaseChannel(DMA, i); |
| | | if (DMAC_Channel_Array[i].CallbackSpi!= NULL) |
| | | { |
| | | DMAC_Channel_Array[i].CallbackSpi(SPI_CB_FLAG_DMA, (uint16_t *)DMAC_Channel_Array[i].pBuffPtr, |
| | |
| | | } |
| | | } |
| | | |
| | | void DMA_IRQHandler(void) |
| | | { |
| | | PAN_IO_TIMING_TRACK_LEVEL(CONFIG_TRACK_PIN_DMA_IRQ, 1); |
| | | |
| | | DMA_IRQHandlerOverlay(); |
| | | |
| | | PAN_IO_TIMING_TRACK_LEVEL(CONFIG_TRACK_PIN_DMA_IRQ, 0); |
| | | } |