BLE_PAN1070.git

			@@ -55,6 +55,12 @@
			#define NRF_RX_TO_TX_TIME (110)
			#define NRF_TX_TO_RX_TIME (110)

			#define PHY_MODED_DEFAULT (0)
			#define PHY_MODED_AGC_0X0F (1)
			#define PHY_MODED_FORCE_GAIN_0X0F (2)

			#define PHY_CFG_MODE PHY_MODED_DEFAULT

			#define REG_WRITE_BITS(reg, mask, value) (reg) = (((reg) & ~(mask)) \| (value))

			#define __nop() __asm("nop")
			@@ -287,7 +293,7 @@
			return 0;
			}

			__ramfunc uint8_t panchip_prf_ble_handler(void)
			__weak uint8_t panchip_prf_ble_handler(void)
			{
			if (panchip_prf_isr_resume_ble_cb() == 1) {
			return 1;
			@@ -767,7 +773,7 @@
			return status;
			}

			void panchip_prf_set_phy(prf_phy_t phy)
			__weak void panchip_prf_set_phy(prf_phy_t phy)
			{
			rf_config.phy = phy;

			@@ -1025,3 +1031,40 @@

			return trans_wait_time;
			}

			void panchip_prf_phy_cfg_mode_set(uint32_t *phy_data, uint16_t len)
			{
			#if(PHY_CFG_MODE == PHY_MODED_AGC_0X0F)
			for(int i = 0; i < len; i++) {
			if(phy_data[i] == 0x00d4a202) {
			phy_data[i] = 0x00dea202;
			} else if(phy_data[i] == 0x002fa202) {
			phy_data[i] = 0x000fa202;

			break;
			}
			}
			#elif(PHY_CFG_MODE == PHY_MODED_FORCE_GAIN_0X0F)
			for(int i = 0; i < len; i++) {
			if(phy_data[i] == 0x00d6a202) {
			phy_data[i] = 0x00c2a202;
			} else if(phy_data[i] == 0x00b7a202) {
			phy_data[i] = 0x00c2a202;
			} else if((phy_data[i] == 0x0006a202) && (phy_data[i + 1] == 0x000ca302)) {
			phy_data[i] = 0x00dea202;
			} else if(phy_data[i] == 0x00f2a202) {
			phy_data[i] = 0x00dea202;
			} else if(phy_data[i] == 0x00d4a202) {
			phy_data[i] = 0x00dea202;
			} else if(phy_data[i] == 0x0003a202) {
			phy_data[i] = 0x000fa202;
			} else if(phy_data[i] == 0x0007a202) {
			phy_data[i] = 0x000fa202;
			} else if(phy_data[i] == 0x002fa202) {
			phy_data[i] = 0x000fa202;

			break;
			}
			}
			#endif
			}