| | |
| | | /* |
| | | * Copyright (c) 2020-2021 Shanghai Panchip Microelectronics Co.,Ltd. |
| | | * Copyright (c) 2020-2025 Shanghai Panchip Microelectronics Co.,Ltd. |
| | | * |
| | | * SPDX-License-Identifier: Apache-2.0 |
| | | */ |
| | | |
| | | #include "soc_api.h" |
| | | #include "app_log.h" |
| | | #include "uart_dfu.h" |
| | | #include "pan_uart.h" |
| | | #include "flash_manager.h" |
| | | |
| | | #define XMODEM_UART UART0 |
| | | #define BAUDRATE 921600 |
| | | #define XMODEM_UART UART0 |
| | | #define BAUDRATE 921600 |
| | | |
| | | #define SOH 0x01 |
| | | #define STX 0x02 |
| | |
| | | return 0; |
| | | } |
| | | |
| | | RAM_FUNC static int xmodemReceive(uint32_t addr) |
| | | CONFIG_RAM_CODE int xmodemReceive(uint32_t addr) |
| | | { |
| | | unsigned char xbuff[1030]; /* 1024 for XModem 1k + 3 head chars + 2 crc + nul */ |
| | | unsigned char *p; |
| | |
| | | #endif |
| | | static void uart_device_init(void) |
| | | { |
| | | CLK_AHBPeriphClockCmd(CLK_AHBPeriph_APB1, ENABLE); |
| | | CLK_AHBPeriphClockCmd(CLK_AHBPeriph_APB1, ENABLE); |
| | | CLK_APB1PeriphClockCmd(CLK_APB1Periph_UART0, ENABLE); |
| | | |
| | | |
| | | SYS_SET_MFP(P1, 6, UART0_TX); |
| | | SYS_SET_MFP(P1, 7, UART0_RX); |
| | | GPIO_EnableDigitalPath(P1, BIT7); |
| | |
| | | |
| | | Init_Struct.UART_BaudRate = BAUDRATE; |
| | | Init_Struct.UART_LineCtrl = Uart_Line_8n1; |
| | | |
| | | |
| | | /* Init UART0 for printf */ |
| | | UART_Init(UART0, &Init_Struct); |
| | | UART_EnableFifo(UART0); |
| | | UART_ResetRxFifo(UART0); |
| | | } |
| | | |
| | | |
| | | void on_uart_dfu_enter(void) |
| | | { |
| | | int rc; |
| | | |
| | | fm_status_refresh(); /* clear flash manager for a new ota process */ |
| | | uart_device_init(); |
| | | while (1) { |
| | | rc = xmodemReceive(FLASH_AREA_IMAGE_START); |
| | | int rc; |
| | | |
| | | #if APP_LOG_EN |
| | | APP_LOG_INFO("Entering UART DFU flow..\n"); |
| | | soc_busy_wait(10000); // Wait for print done |
| | | #endif |
| | | |
| | | fm_status_refresh(); /* clear flash manager for a new ota process */ |
| | | uart_device_init(); |
| | | |
| | | while (1) { |
| | | rc = xmodemReceive(FLASH_AREA_IMAGE_START); |
| | | |
| | | if (rc > 1024) { /* receive image info */ |
| | | if (!fm_image_completed_check(FLASH_AREA_IMAGE_START)) { /* check image */ |
| | | fm_image_make_invalid(FLASH_AREA_IMAGE_START); |
| | | } |
| | | SYS_UnlockReg(); |
| | | if (!fm_image_completed_check(FLASH_AREA_IMAGE_START)) { /* check image */ |
| | | fm_image_make_invalid(FLASH_AREA_IMAGE_START); |
| | | } |
| | | SYS_UnlockReg(); |
| | | CLK_ResetChip(); |
| | | SYS_LockReg(); |
| | | } |
| | | SYS_delay_10nop(1000000); |
| | | } |
| | | |
| | | SYS_delay_10nop(1000000); |
| | | } |
| | | } |