| | |
| | | /* |
| | | * Copyright (c) 2019-2023 Beijing Hanwei Innovation Technology Ltd. Co. and |
| | | * Copyright (c) 2019-2025 Beijing Hanwei Innovation Technology Ltd. Co. and |
| | | * its subsidiaries and affiliates (collectly called MKSEMI). |
| | | * |
| | | * All rights reserved. |
| | |
| | | #define SLEEP_TIMER_INT_STATUS (0x80000000) |
| | | #define SLEEP_TIMER_INT_CLR (0x00000004) |
| | | |
| | | static struct SLEEP_TIMER_HANDLE_T sleep_timer_handle = { |
| | | struct SLEEP_TIMER_HANDLE_T sleep_timer_handle = { |
| | | .mode = SLEEP_TIMER_MODE_ONESHOT, |
| | | .time = 32768, |
| | | .enable = 0, |
| | | .int_en = true, |
| | | .time = 32768, |
| | | .ppm = 0, |
| | | .callback = NULL, |
| | | }; |
| | |
| | | sleep_timer_handle.callback = callback; |
| | | sleep_timer_handle.int_en = int_en; |
| | | sleep_timer_handle.mode = mode; |
| | | sleep_timer_handle.enable = 1; |
| | | |
| | | if (sleep_timer_handle.int_en) |
| | | { |
| | |
| | | NVIC_DisableIRQ(SLEEP_TIMER_IRQn); |
| | | NVIC_ClearPendingIRQ(SLEEP_TIMER_IRQn); |
| | | } |
| | | sleep_timer_handle.enable = 0; |
| | | } |
| | | |
| | | void sleep_timer_start(uint32_t time) |
| | |
| | | REG_WRITE(SLEEP_TIMER_REG_STCR, SLEEP_TIMER_MODE_STOP); |
| | | } |
| | | |
| | | uint32_t high_xtal_off_time(void) |
| | | uint32_t xtal_38m4_off_time(void) |
| | | { |
| | | #ifdef UWB_EN |
| | | uint32_t slp_cnt = REG_READ(0x40000074); |
| | | return (uint32_t)((int32_t)slp_cnt - (int32_t)((int32_t)slp_cnt * sleep_timer_handle.ppm / 1000000)); |
| | | return (uint32_t)((int32_t)slp_cnt + (int32_t)((int32_t)slp_cnt * sleep_timer_handle.ppm / 1000000)); |
| | | #else |
| | | return REG_READ(SLEEP_TIMER_REG_STDR); |
| | | #endif |