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| | | /* |
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| | | * Copyright (c) 2019-2023 Beijing Hanwei Innovation Technology Ltd. Co. and |
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| | | * Copyright (c) 2019-2025 Beijing Hanwei Innovation Technology Ltd. Co. and |
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| | | * its subsidiaries and affiliates (collectly called MKSEMI). |
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| | | * |
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| | | * All rights reserved. |
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| | |
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| | | } |
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| | | uint32_t get_uart1_dma_cndtr(void) |
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| | | { |
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| | | return dma_handle[DMA_ID0].base->CH[6].DATA_SIZE; |
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| | | return dma_handle[DMA_ID0].base->CH[6].DATA_SIZE; |
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| | | } |
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| | | uint32_t get_uart0_dma_cndtr(void) |
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| | | { |
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| | | return dma_handle[DMA_ID0].base->CH[4].DATA_SIZE; |
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| | | return dma_handle[DMA_ID0].base->CH[4].DATA_SIZE; |
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| | | } |
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| | | |
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| | | int dma_transfer(enum DMA_CH_T ch, void *src_addr, void *dst_addr, uint32_t size, drv_callback_t callback) |
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| | | { |
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| | | ASSERT(dst_addr, "Invalid transfer dst addr"); |
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