| | |
|---|
| | | /* |
|---|
| | | * Copyright (c) 2019-2023 Beijing Hanwei Innovation Technology Ltd. Co. and |
|---|
| | | * Copyright (c) 2019-2025 Beijing Hanwei Innovation Technology Ltd. Co. and |
|---|
| | | * its subsidiaries and affiliates (collectly called MKSEMI). |
|---|
| | | * |
|---|
| | | * All rights reserved. |
|---|
| | |
|---|
| | | #define TRACE_STD_LIB_EN (0) |
|---|
| | | |
|---|
| | | /** Configure trace level for modules: BOOT | TEST | UCI | UWB | APP | DRIVER | PHY | MAC */ |
|---|
| | | #define TRACE_LVL_CONFIG_0 (0x44444004) |
|---|
| | | #define TRACE_LVL_CONFIG_0 (0x44444444) |
|---|
| | | |
|---|
| | | /** Configure trace level for modules: CCC | FIRA | OS */ |
|---|
| | | #define TRACE_LVL_CONFIG_1 (0x00000444) |
|---|
| | |
|---|
| | | /* =========================================================================================================================== */ |
|---|
| | | /* ================ Power configuration ================ */ |
|---|
| | | /* =========================================================================================================================== */ |
|---|
| | | |
|---|
| | | /** Enable low power mode */ |
|---|
| | | #ifndef LOW_POWER_EN |
|---|
| | | #define LOW_POWER_EN (1) |
|---|
| | | #define LOW_POWER_EN (0) |
|---|
| | | #endif |
|---|
| | | |
|---|
| | | /** Enable 32.768K crystal as low power mode clock source */ |
|---|
| | |
|---|
| | | #define XTAL32K_EN (1) |
|---|
| | | #endif |
|---|
| | | |
|---|
| | | /** Enable DC-DC */ |
|---|
| | | #ifndef DCDC_EN |
|---|
| | | #define DCDC_EN (1) |
|---|
| | | /** Configure power supply mode: 0 - Bypass mode, 1 - DC-DC mode, 2 - Current limiter mode */ |
|---|
| | | #ifndef POWER_SUPPLY_MODE |
|---|
| | | #define POWER_SUPPLY_MODE (PSM_DCDC_MODE) |
|---|
| | | #endif |
|---|
| | | |
|---|
| | | /** Enable BOR */ |
|---|
| | |
|---|
| | | /** Configure 32K clock source @ref enum CLOCK_ATTACH_TYPE_T */ |
|---|
| | | #if XTAL32K_EN |
|---|
| | | #define CLK_32K_SOURCE (CLOCK_XTAL32K_TO_32K_CLK) |
|---|
| | | #define LOW_POWER_CLOCK_PPM (50) |
|---|
| | | #define LOW_POWER_CLOCK_PPM (100) |
|---|
| | | #else |
|---|
| | | #define CLK_32K_SOURCE (CLOCK_RCO32K_TO_32K_CLK) |
|---|
| | | #define LOW_POWER_CLOCK_PPM (1000) |
|---|
| | | #endif |
|---|
| | | |
|---|
| | | /** Enable system tick timer (period = 10ms), needed by OS */ |
|---|
| | | #define SYS_TICK_EN (1) |
|---|
| | | |
|---|
| | | /* =========================================================================================================================== */ |
|---|
| | | /* ================ UWB configuration ================ */ |
|---|
| | | /* =========================================================================================================================== */ |
|---|
| | | |
|---|
| | | /** Enable Post-process filter */ |
|---|
| | | #define FILTER_EN (0) |
|---|
| | | |
|---|
| | | /** Enable RSSI output */ |
|---|
| | | #define RSSI_EN (1) |
|---|
| | | |
|---|
| | | /** Enable Channel status information output */ |
|---|
| | | #define CSI_EN (0) |
|---|
| | | |
|---|
| | | /** Enable AoA */ |
|---|
| | | #define AOA_EN (0) |
|---|
| | | |
|---|
| | | /** TX power level: 0 ~ 60 */ |
|---|
| | | #define TX_POWER_LEVEL (60) |
|---|
| | | |
|---|
| | | /** Antenna port number for AoA, 2~4 */ |
|---|
| | | #define RX_AOA_ANT_PORTS_NUM (4) |
|---|
| | | |
|---|
| | | /** Antenna ports combination for AoA, @ref enum RX_ANTENNA_MODE_T */ |
|---|
| | | #define RX_AOA_ANT_PORTS_COMBINATION (RX_4PORTS_ANT_3_0_1_2) |
|---|
| | | #define TX_POWER_LEVEL (36) |
|---|
| | | |
|---|
| | | /** Antenna ports combination, @ref macro definition RX_xPORTS_ANT_xxx */ |
|---|
| | | #define RX_ANT_PORTS_COMBINATION (RX_4PORTS_ANT_3_0_1_2) |
|---|
| | | #define RX_ANT_PORTS_COMBINATION (RX_1PORT_ANT_3) |
|---|
| | | |
|---|
| | | /** Antenna pattern: Linear or Square */ |
|---|
| | | #define SQUARE_4ANTS (0) |
|---|
| | | /// Antenna pattern |
|---|
| | | #define ANT_PATTERN (ANT_PATTERN_LINEAR) |
|---|
| | | |
|---|
| | | #define RANGING_CORR (0) |
|---|
| | | /** Enable XTAL automatic tuning, 0: disable, 1: follow peer device, 2: calibrate to central frequency (NTC) */ |
|---|
| | | #define X38M4_AUTO_TUNE_EN (0) |
|---|
| | | |
|---|
| | | /** Velocity of propagation (%) */ |
|---|
| | | #define VP_VAL (100) |
|---|
| | | /* ========================================== PPDU configuration ======================================== */ |
|---|
| | | |
|---|
| | | /** channel number: 2, 5, 9 */ |
|---|
| | | #define UWB_CH_NUM (9) |
|---|
| | | |
|---|
| | | /** mean PRF: @ref enum PRF_MODE_T */ |
|---|
| | | #define UWB_MEAN_PRF (PRF_62M4) |
|---|
| | | |
|---|
| | | /** preamble code index: 1 ~ 8, 9 ~ 24, 25 ~ 32 */ |
|---|
| | | #define UWB_PREAMBLE_CODE_IDX (10) |
|---|
| | | |
|---|
| | | /** preamble duration: @ref enum PREAMBLE_DURATION_T */ |
|---|
| | | #define UWB_PREAMBLE_DURATION (SYMBOLS_64) |
|---|
| | | |
|---|
| | | /** SFD ID: @ref enum SFD_ID_T */ |
|---|
| | | #define UWB_SFD_ID (SFD2_LEN8) |
|---|
| | | |
|---|
| | | /** PSDU data rate: @ref enum PSDU_DATA_RATE_T */ |
|---|
| | | #define UWB_PSDU_DATA_RATE (BPS_6M8) |
|---|
| | | |
|---|
| | | /** STS segment number: @ref enum STS_SEGMENTS_NUM_T */ |
|---|
| | | #define UWB_STS_SEGMENT_NUM (STS_SEGMENTS_1) |
|---|
| | | |
|---|
| | | /** STS segment length: @ref enum STS_SEGMENTS_LENGTH_T */ |
|---|
| | | #define UWB_STS_SEGMENT_LEN (STS_SEG_LEN64) |
|---|
| | | |
|---|
| | | /** Ranging frame packet type: @ref enum RFRAME_TYPE_T, if AoA is enabled, the frame should contain STS */ |
|---|
| | | #define UWB_RFRAME_TYPE (SP1) |
|---|
| | | |
|---|
| | | /** Maximum PHY payload length */ |
|---|
| | | #define PHY_PAYLOAD_LEN_MAX (127) |
|---|
| | | |
|---|
| | | /* ========================================== Timing configuration ======================================== */ |
|---|
| | | |
|---|
| | | /// Period prefetch time for event program from wakeup - 500us+ |
|---|
| | | #define UWB_PERIOD_PREFETCH_TIME (US_TO_PHY_TIMER_COUNT(500)) |
|---|
| | | /// Event prefetch time for event program - 400us |
|---|
| | | #define UWB_EVT_PREFETCH_TIME (US_TO_PHY_TIMER_COUNT(400)) |
|---|
| | | /// RX window open in advance time - 10us |
|---|
| | | #define UWB_RX_OPEN_IN_ADVANCE (US_TO_PHY_TIMER_COUNT(10)) |
|---|
| | | /// RX window - 750us |
|---|
| | | #define UWB_RX_WINDOW (US_TO_PHY_TIMER_COUNT(750)) |
|---|
| | | |
|---|
| | | /** Uplink TDoA TX interval, unit: ms */ |
|---|
| | | #define UWB_UL_TDOA_INTERVAL (1000) |
|---|
| | | |
|---|
| | | /** Ranging slot duration, unit: ms */ |
|---|
| | | #define UWB_UL_TDOA_RAND_WINDOW (20) |
|---|
| | | |
|---|
| | | /* =========================================================================================================================== */ |
|---|
| | | /* ================ Simple Selection ================ */ |
|---|
| | | /* ================ End ================ */ |
|---|
| | | /* =========================================================================================================================== */ |
|---|
| | | //#define MK_SIMPLE_TX |
|---|
| | | |
|---|
| | | //#define MK_SIMPLE_RX |
|---|
| | | |
|---|
| | | //#define MK_DS_TWR_INIT |
|---|
| | | |
|---|
| | | //#define MK_DS_TWR_RESP |
|---|
| | | |
|---|
| | | //#define MK_DS_TWR_INIT_STS |
|---|
| | | |
|---|
| | | //#define MK_DS_TWR_RESP_STS |
|---|
| | | |
|---|
| | | //#define MK_SS_TWR_DW_INIT |
|---|
| | | |
|---|
| | | #define MK_SS_TWR_DW_RESP |
|---|
| | | |
|---|
| | | #define INPUT_5V_Pin IO_PIN_11 |
|---|
| | | #define RSSI_EN (0) |
|---|
| | | #define WS2812_PIN IO_PIN_7 |
|---|
| | | #define BUTTON_PIN IO_PIN_4 |
|---|
| | | #define WS2812_PIN IO_PIN_10 |
|---|
| | | #define BUTTON_PIN IO_PIN_8 |
|---|
| | | #define _4G_USART_RX_Pin IO_PIN_17 |
|---|
| | | #define ACCLERATE_DETECT_Pin IO_PIN_2 |
|---|
| | | #define SDA_PIN IO_PIN_3 |
|---|
| | | #define SER_PIN IO_PIN_3 |
|---|
| | | #define SCL_PIN IO_PIN_4 |
|---|
| | | #define SRCLK_PIN IO_PIN_8 |
|---|
| | | #define RCLK_PIN IO_PIN_7 |
|---|
| | | #define RCLK_PIN IO_PIN_11 |
|---|
| | | #define ADC_GND_ENABLE IO_PIN_12 |
|---|
| | | #define PCA_INPUT_DETECT IO_PIN_17 |
|---|
| | | #define GET_USERKEY gpio_pin_get_val(SCL_PIN) |
|---|
| | | #define CHANGE_UART_PIN IO_PIN_13 |
|---|
| | | #define WSF_EN |
|---|
| | | #define SLEEP_COUNT 1000 |
|---|
| | | /** Velocity of propagation (%) */ |
|---|
| | | #define VP_VAL (100) |
|---|
| | | #define RANGING_CORR (0) |
|---|
| | | //#define STS_MODE |
|---|
| | | //#define MK_MODE |
|---|
| | | #define DW1000 |
|---|
| | | //#define DW1000 |
|---|
| | | #define STS_MODE_SQUARE |
|---|
| | | |
|---|
| | | /* =========================================================================================================================== */ |
|---|
| | | /* ================ End ================ */ |
|---|
| | | /* =========================================================================================================================== */ |
|---|
