对比新文件 |
| | |
| | | /* |
| | | * Copyright (c) 2019-2023 Beijing Hanwei Innovation Technology Ltd. Co. and |
| | | * its subsidiaries and affiliates (collectly called MKSEMI). |
| | | * |
| | | * All rights reserved. |
| | | * |
| | | * Redistribution and use in source and binary forms, with or without |
| | | * modification, are permitted provided that the following conditions are met: |
| | | * |
| | | * 1. Redistributions of source code must retain the above copyright notice, |
| | | * this list of conditions and the following disclaimer. |
| | | * |
| | | * 2. Redistributions in binary form, except as embedded into an MKSEMI |
| | | * integrated circuit in a product or a software update for such product, |
| | | * must reproduce the above copyright notice, this list of conditions and |
| | | * the following disclaimer in the documentation and/or other materials |
| | | * provided with the distribution. |
| | | * |
| | | * 3. Neither the name of MKSEMI nor the names of its contributors may be used |
| | | * to endorse or promote products derived from this software without |
| | | * specific prior written permission. |
| | | * |
| | | * 4. This software, with or without modification, must only be used with a |
| | | * MKSEMI integrated circuit. |
| | | * |
| | | * 5. Any software provided in binary form under this license must not be |
| | | * reverse engineered, decompiled, modified and/or disassembled. |
| | | * |
| | | * THIS SOFTWARE IS PROVIDED BY MKSEMI "AS IS" AND ANY EXPRESS OR IMPLIED |
| | | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
| | | * MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| | | * DISCLAIMED. IN NO EVENT SHALL MKSEMI OR CONTRIBUTORS BE LIABLE FOR ANY |
| | | * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
| | | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
| | | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND |
| | | * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| | | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| | | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| | | */ |
| | | |
| | | #include "mk_timer.h" |
| | | #include "mk_clock.h" |
| | | #include "mk_reset.h" |
| | | #include "mk_trace.h" |
| | | |
| | | static struct TIMER_HANDLE_T timer_handle[TIMER_MAX_NUM] = { |
| | | { |
| | | .base = TIMER0, |
| | | .irq = TIMER0_IRQn, |
| | | }, |
| | | { |
| | | .base = TIMER1, |
| | | .irq = TIMER1_IRQn, |
| | | }, |
| | | }; |
| | | |
| | | int timer_open(enum TIMER_DEV_T id, struct TIMER_CFG_T *config) |
| | | { |
| | | if ((id >= TIMER_MAX_NUM) && (config == NULL)) |
| | | { |
| | | return DRV_ERROR; |
| | | } |
| | | else if (id == TIMER_ID0) |
| | | { |
| | | // enable TIMER0 clock |
| | | clock_enable(CLOCK_TIMER0); |
| | | reset_module(RESET_MODULE_TIMER0); |
| | | } |
| | | else if (id == TIMER_ID1) |
| | | { |
| | | // enable TIMER1 clock |
| | | clock_enable(CLOCK_TIMER1); |
| | | reset_module(RESET_MODULE_TIMER1); |
| | | } |
| | | |
| | | timer_handle[id].int_en = config->int_en; |
| | | timer_handle[id].callback = config->callback; |
| | | |
| | | // load |
| | | timer_handle[id].base->RELOAD = config->load; |
| | | // enable |
| | | timer_handle[id].base->CTRL = TIMER_CTRL_INT_EN(config->int_en) | TIMER_CTRL_EXTIN(config->extin_type) | TIMER_CTRL_ENABLE_MSK; |
| | | |
| | | #if TIMER0_INT_MODE_EN || TIMER1_INT_MODE_EN |
| | | if (config->int_en) |
| | | { |
| | | NVIC_SetPriority(timer_handle[id].irq, IRQ_PRIORITY_NORMAL); |
| | | NVIC_ClearPendingIRQ(timer_handle[id].irq); |
| | | NVIC_EnableIRQ(timer_handle[id].irq); |
| | | } |
| | | #endif |
| | | |
| | | return DRV_OK; |
| | | } |
| | | |
| | | int timer_close(enum TIMER_DEV_T id) |
| | | { |
| | | if (id >= TIMER_MAX_NUM) |
| | | { |
| | | return DRV_ERROR; |
| | | } |
| | | |
| | | // disable |
| | | timer_handle[id].base->CTRL = 0; |
| | | |
| | | #if TIMER0_INT_MODE_EN || TIMER1_INT_MODE_EN |
| | | if (timer_handle[id].int_en) |
| | | { |
| | | NVIC_DisableIRQ(timer_handle[id].irq); |
| | | NVIC_ClearPendingIRQ(timer_handle[id].irq); |
| | | } |
| | | #endif |
| | | |
| | | if (id == TIMER_ID0) |
| | | { |
| | | // disable TIMER0 clock |
| | | clock_disable(CLOCK_TIMER0); |
| | | } |
| | | else if (id == TIMER_ID1) |
| | | { |
| | | // disable TIMER1 clock |
| | | clock_disable(CLOCK_TIMER1); |
| | | } |
| | | return DRV_OK; |
| | | } |
| | | |
| | | void timer_period_set(enum TIMER_DEV_T id, uint32_t count) |
| | | { |
| | | ASSERT(id < TIMER_MAX_NUM, "Timer id is wrong"); |
| | | // load |
| | | timer_handle[id].base->RELOAD = count; |
| | | } |
| | | |
| | | uint32_t timer_count_get(enum TIMER_DEV_T id) |
| | | { |
| | | ASSERT(id < TIMER_MAX_NUM, "Timer id is wrong"); |
| | | return timer_handle[id].base->VALUE; |
| | | } |
| | | |
| | | void timer_count_set(enum TIMER_DEV_T id, uint32_t count) |
| | | { |
| | | ASSERT(id < TIMER_MAX_NUM, "Timer id is wrong"); |
| | | // update current value |
| | | timer_handle[id].base->VALUE = count; |
| | | } |
| | | |
| | | void TIMER0_IRQHandler(void) |
| | | { |
| | | #if TIMER0_INT_MODE_EN |
| | | enum TIMER_DEV_T id = TIMER_ID0; |
| | | // clear |
| | | timer_handle[id].base->INTR_CLR = TIMER_INTR_CLR_MSK; |
| | | if (timer_handle[id].callback) |
| | | { |
| | | timer_handle[id].callback(&id, timer_handle[id].base->RELOAD); |
| | | } |
| | | #endif |
| | | } |
| | | |
| | | void TIMER1_IRQHandler(void) |
| | | { |
| | | #if TIMER1_INT_MODE_EN |
| | | enum TIMER_DEV_T id = TIMER_ID1; |
| | | // clear |
| | | timer_handle[id].base->INTR_CLR = TIMER_INTR_CLR_MSK; |
| | | if (timer_handle[id].callback) |
| | | { |
| | | timer_handle[id].callback(&id, timer_handle[id].base->RELOAD); |
| | | } |
| | | #endif |
| | | } |