| | |
| | | /* If the external reference voltage driving capability is insufficient */ |
| | | /* It is recommended to enable this configuration */ |
| | | // val |= (9 << 1) | (1 << 4); |
| | | val |= (1 << 9) | (7 << 5) | (1 << 4); |
| | | } |
| | | REG_WRITE(0x4000062C, val); |
| | | |
| | |
| | | { |
| | | // enable ADC |
| | | struct ADC_CFG_T vs_adc_cfg; |
| | | vs_adc_cfg.mode = ADC_MODE_SINGLE; /* Selected single conversion mode */ |
| | | vs_adc_cfg.mode = ADC_MODE_CONTINUE; /* Selected single conversion mode */ |
| | | vs_adc_cfg.clk_sel = ADC_CLK_HIGH; /* Selected 62.4M high speed clock */ |
| | | vs_adc_cfg.vref_sel = ADC_SEL_VREF_INT; /* Using internal reference voltage (1.2V)*/ |
| | | vs_adc_cfg.rate = 1000; /* ADC works at high frequency system clock, the maximum sampling rate is 2M */ |
| | |
| | | adc_close(); |
| | | } |
| | | |
| | | static void adc_continue_callback(void *data, uint32_t number) |
| | | { |
| | | |
| | | LOG_INFO(TRACE_MODULE_APP, "Chip adc callback %d degree\r\n", data); |
| | | } |
| | | int16_t battery_monitor_get(void) |
| | | { |
| | | #define NUM_SAMPLES (3) |
| | | |
| | | uint32_t sample[NUM_SAMPLES]; |
| | | adc_get(&sample[0], NUM_SAMPLES, adc_continue_callback); |
| | | adc_get(&sample[0], NUM_SAMPLES, NULL); |
| | | |
| | | int32_t sum = 0; |
| | | for (int i = 0; i < NUM_SAMPLES; i++) |