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| | | /* =========================================================================================================================== */ |
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| | | |
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| | | /** Enable trace output */ |
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| | | #define TRACE_EN (0) |
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| | | #define TRACE_EN (1) |
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| | | |
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| | | /** Enable exception reboot */ |
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| | | #ifndef TRACE_REBOOT_EN |
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| | | |
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| | | //#define MK_DS_TWR_RESP_STS |
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| | | |
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| | | //#define MK_SS_TWR_DW_INIT |
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| | | #define MK_SS_TWR_DW_INIT |
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| | | |
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| | | #define MK_SS_TWR_DW_RESP |
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| | | |
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| | | #define INPUT_5V_Pin IO_PIN_11 |
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| | | #define RSSI_EN (1) |
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| | | |
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| | | #define RANGING_CORR (0) |
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| | | #define _4G_USART_RX_Pin IO_PIN_6 |
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| | | #define ACCLERATE_DETECT_Pin IO_PIN_2 |
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| | | #define SDA_PIN IO_PIN_3 |
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| | | #define SER_PIN IO_PIN_3 |
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