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| | | |
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| | | /* USER CODE END 0 */ |
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| | | |
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| | | /* store fault info for post-mortem inspection */ |
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| | | typedef struct { |
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| | | volatile uint32_t r0; |
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| | | volatile uint32_t r1; |
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| | | volatile uint32_t r2; |
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| | | volatile uint32_t r3; |
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| | | volatile uint32_t r12; |
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| | | volatile uint32_t lr; |
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| | | volatile uint32_t pc; |
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| | | volatile uint32_t psr; |
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| | | volatile uint32_t cfsr; |
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| | | volatile uint32_t hfsr; |
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| | | volatile uint32_t mmfar; |
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| | | volatile uint32_t bfar; |
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| | | } MemFaultInfo_t; |
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| | | |
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| | | volatile MemFaultInfo_t g_memFaultInfo; |
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| | | |
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| | | void MemManage_Handler_C(uint32_t *pulFaultStackAddress); |
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| | | |
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| | | |
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| | | /* External variables --------------------------------------------------------*/ |
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| | | extern TIM_HandleTypeDef htim2; |
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| | | extern TIM_HandleTypeDef htim3; |
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| | |
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| | | /** |
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| | | * @brief This function handles Memory management fault. |
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| | | */ |
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| | | //__attribute__((naked)) void MemManage_Handler(void) |
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| | | //{ |
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| | | // __ASM volatile( |
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| | | // "TST LR, #4\n\t" |
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| | | // "ITE EQ\n\t" |
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| | | // "MRSEQ R0, MSP\n\t" |
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| | | // "MRSNE R0, PSP\n\t" |
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| | | // "B MemManage_Handler_C\n\t" |
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| | | // ); |
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| | | //} |
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| | | |
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| | | /* C handler: pulFaultStackAddress points to stacked r0, r1, r2, r3, r12, lr, pc, psr */ |
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| | | void MemManage_Handler_C(uint32_t *pulFaultStackAddress) |
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| | | void MemManage_Handler(void) |
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| | | { |
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| | | /* save stacked registers */ |
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| | | g_memFaultInfo.r0 = pulFaultStackAddress[0]; |
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| | | g_memFaultInfo.r1 = pulFaultStackAddress[1]; |
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| | | g_memFaultInfo.r2 = pulFaultStackAddress[2]; |
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| | | g_memFaultInfo.r3 = pulFaultStackAddress[3]; |
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| | | g_memFaultInfo.r12 = pulFaultStackAddress[4]; |
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| | | g_memFaultInfo.lr = pulFaultStackAddress[5]; |
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| | | g_memFaultInfo.pc = pulFaultStackAddress[6]; |
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| | | g_memFaultInfo.psr = pulFaultStackAddress[7]; |
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| | | /* USER CODE BEGIN MemoryManagement_IRQn 0 */ |
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| | | |
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| | | /* save fault status registers */ |
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| | | g_memFaultInfo.cfsr = SCB->CFSR; |
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| | | g_memFaultInfo.hfsr = SCB->HFSR; |
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| | | g_memFaultInfo.mmfar = SCB->MMFAR; |
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| | | g_memFaultInfo.bfar = SCB->BFAR; |
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| | | |
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| | | /* try to print brief info to debug UART (may not always succeed in fault context) */ |
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| | | DBG_Printf("*** MemManage Fault ***\r\n"); |
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| | | DBG_Printf("CFSR=0x%08x HFSR=0x%08x MMFAR=0x%08x BFAR=0x%08x\r\n", |
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| | | (unsigned)g_memFaultInfo.cfsr, |
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| | | (unsigned)g_memFaultInfo.hfsr, |
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| | | (unsigned)g_memFaultInfo.mmfar, |
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| | | (unsigned)g_memFaultInfo.bfar); |
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| | | DBG_Printf("R0=0x%08x R1=0x%08x R2=0x%08x R3=0x%08x\r\n", |
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| | | (unsigned)g_memFaultInfo.r0, |
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| | | (unsigned)g_memFaultInfo.r1, |
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| | | (unsigned)g_memFaultInfo.r2, |
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| | | (unsigned)g_memFaultInfo.r3); |
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| | | DBG_Printf("R12=0x%08x LR=0x%08x PC=0x%08x PSR=0x%08x\r\n", |
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| | | (unsigned)g_memFaultInfo.r12, |
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| | | (unsigned)g_memFaultInfo.lr, |
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| | | (unsigned)g_memFaultInfo.pc, |
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| | | (unsigned)g_memFaultInfo.psr); |
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| | | |
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| | | /* break here for debugger, then loop forever */ |
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| | | __asm volatile ("BKPT #0"); |
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| | | /* USER CODE END MemoryManagement_IRQn 0 */ |
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| | | while (1) |
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| | | { |
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| | | __asm volatile ("WFI"); |
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| | | /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */ |
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| | | /* USER CODE END W1_MemoryManagement_IRQn 0 */ |
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| | | } |
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| | | } |
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| | | |
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