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| | | #define VBAT_ADDRESS (0x08) |
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| | | #define VTEMP_ADDRESS (0x09) |
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| | | #define XTRIM_ADDRESS (0x1E) |
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| | | |
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| | | u8 module_power; |
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| | | uint32_t status_reg = 0; |
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| | | int dwt_initialise(uint16_t config) |
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| | | { |
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| | | |
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| | | u32 power_temp,power_input; |
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| | | uint8_t plllockdetect = EC_CTRL_PLLLCK; |
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| | | uint16_t otp_addr = 0; |
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| | | uint32_t ldo_tune = 0; |
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| | |
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| | | |
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| | | dw1000local.dwt_txcallback = NULL ; |
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| | | dw1000local.dwt_rxcallback = NULL ; |
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| | | |
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| | | status_reg = dwt_read32bitreg(SYS_STATUS_ID); |
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| | | status_reg = dwt_read32bitreg(SYS_STATUS_ID); |
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| | | // Read and validate device ID return -1 if not recognised |
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| | | dw1000local.deviceID = dwt_readdevid() ; |
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| | | while (DWT_DEVICE_ID != dw1000local.deviceID) // MP IC ONLY (i.e. DW1000) FOR THIS CODE |
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| | | { |
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| | | dw1000local.deviceID = dwt_readdevid() ; |
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| | | } |
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| | | |
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| | | status_reg = dwt_read32bitreg(SYS_STATUS_ID); |
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| | | _dwt_enableclocks(FORCE_SYS_XTI); // NOTE: set system clock to XTI - this is necessary to make sure the values read by _dwt_otpread are reliable |
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| | | |
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| | | dwt_write32bitreg(TX_POWER_ID, 0x1f1f1f1f); |
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| | | status_reg = dwt_read32bitreg(SYS_STATUS_ID); |
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| | | if(module_power>67) |
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| | | {module_power=67;} |
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| | | if(module_power<0) |
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| | | {module_power=0;} |
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| | | if(module_power>36) |
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| | | { |
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| | | power_temp =(module_power-36); |
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| | | }else{ |
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| | | power_temp = ((6-(module_power/6))<<5)|(module_power%6); |
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| | | } |
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| | | power_input= power_temp<<24|power_temp<<16|power_temp<<8|power_temp; |
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| | | dwt_write32bitreg(TX_POWER_ID, power_input); |
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| | | // Configure the CPLL lock detect |
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| | | dwt_writetodevice(EXT_SYNC_ID, EC_CTRL_OFFSET, 1, &plllockdetect); |
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| | | |
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| | | // Read OTP revision number |
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| | | otp_addr = _dwt_otpread(XTRIM_ADDRESS) & 0xffff; // Read 32 bit value, XTAL trim val is in low octet-0 (5 bits) |
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| | | dw1000local.otprev = (otp_addr >> 8) & 0xff; // OTP revision is next byte |
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| | | |
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| | | status_reg = dwt_read32bitreg(SYS_STATUS_ID); |
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| | | // Load LDO tune from OTP and kick it if there is a value actually programmed. |
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| | | ldo_tune = _dwt_otpread(LDOTUNE_ADDRESS); |
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| | | if((ldo_tune & 0xFF) != 0) |
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| | |
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| | | // Load Part and Lot ID from OTP |
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| | | dw1000local.partID = _dwt_otpread(PARTID_ADDRESS); |
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| | | dw1000local.lotID = _dwt_otpread(LOTID_ADDRESS); |
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| | | |
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| | | status_reg = dwt_read32bitreg(SYS_STATUS_ID); |
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| | | // XTAL trim value is set in OTP for DW1000 module and EVK/TREK boards but that might not be the case in a custom design |
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| | | dw1000local.xtrim = otp_addr & 0x1F; |
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| | | if (!dw1000local.xtrim) // A value of 0 means that the crystal has not been trimmed |
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| | |
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| | | // Configure XTAL trim |
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| | | dwt_xtaltrim(dw1000local.xtrim); |
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| | | |
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| | | status_reg = dwt_read32bitreg(SYS_STATUS_ID); |
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| | | |
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| | | // Load leading edge detect code |
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| | | if(config & DWT_LOADUCODE) |
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| | | { |
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| | |
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| | | dwt_write16bitoffsetreg(PMSC_ID,PMSC_TXFINESEQ_OFFSET ,PMSC_TXFINESEQ_DIS_MASK); |
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| | | |
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| | | } |
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| | | dw1000local.deviceID = dwt_readdevid() ; |
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| | | return DWT_SUCCESS ; |
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| | | |
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| | | } // end dwt_initialise() |
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