| | |
| | | extern DMA_HandleTypeDef hdma_lpuart1_tx; |
| | | extern DMA_HandleTypeDef hdma_usart1_rx; |
| | | extern DMA_HandleTypeDef hdma_usart1_tx; |
| | | extern DMA_HandleTypeDef hdma_usart5_rx; |
| | | extern DMA_HandleTypeDef hdma_usart5_tx; |
| | | extern UART_HandleTypeDef hlpuart1; |
| | | extern UART_HandleTypeDef huart1; |
| | | extern UART_HandleTypeDef huart5; |
| | | /* USER CODE BEGIN EV */ |
| | | |
| | | /* USER CODE END EV */ |
| | |
| | | /* USER CODE BEGIN DMA1_Channel2_3_IRQn 0 */ |
| | | |
| | | /* USER CODE END DMA1_Channel2_3_IRQn 0 */ |
| | | HAL_DMA_IRQHandler(&hdma_usart5_rx); |
| | | HAL_DMA_IRQHandler(&hdma_usart5_tx); |
| | | HAL_DMA_IRQHandler(&hdma_usart1_tx); |
| | | HAL_DMA_IRQHandler(&hdma_usart1_rx); |
| | | /* USER CODE BEGIN DMA1_Channel2_3_IRQn 1 */ |
| | | |
| | | /* USER CODE END DMA1_Channel2_3_IRQn 1 */ |
| | |
| | | /* USER CODE BEGIN DMA1_Channel4_5_6_7_IRQn 0 */ |
| | | |
| | | /* USER CODE END DMA1_Channel4_5_6_7_IRQn 0 */ |
| | | HAL_DMA_IRQHandler(&hdma_usart1_tx); |
| | | HAL_DMA_IRQHandler(&hdma_usart1_rx); |
| | | HAL_DMA_IRQHandler(&hdma_lpuart1_rx); |
| | | HAL_DMA_IRQHandler(&hdma_lpuart1_tx); |
| | | /* USER CODE BEGIN DMA1_Channel4_5_6_7_IRQn 1 */ |
| | |
| | | /* USER CODE BEGIN LPTIM1_IRQn 1 */ |
| | | |
| | | /* USER CODE END LPTIM1_IRQn 1 */ |
| | | } |
| | | |
| | | /** |
| | | * @brief This function handles USART4 and USART5 interrupt. |
| | | */ |
| | | void USART4_5_IRQHandler(void) |
| | | { |
| | | /* USER CODE BEGIN USART4_5_IRQn 0 */ |
| | | __HAL_UART_CLEAR_IDLEFLAG(&huart1); |
| | | /* USER CODE END USART4_5_IRQn 0 */ |
| | | HAL_UART_IRQHandler(&huart5); |
| | | /* USER CODE BEGIN USART4_5_IRQn 1 */ |
| | | |
| | | /* USER CODE END USART4_5_IRQn 1 */ |
| | | } |
| | | |
| | | /** |