| | |
| | | |
| | | //#define USART_INTEGRATE_OUTPUT |
| | | /*------------------------------------ Marcos ------------------------------------------*/ |
| | | #define FRAME_LEN_MAX (127) |
| | | #define FRAME_LEN_MAX_EX (1023) |
| | | #define DWT_DEVICE_ID (0xDECA0130) //!< DW1000 MP device ID |
| | | /* Inter-ranging delay period, in milliseconds. */ |
| | | #define RNG_DELAY_MS 100 |
| | | |
| | | #define PRE_TIMEOUT 5 |
| | | /* Default antenna delay values for 64 MHz PRF. See NOTE 1 below. */ |
| | | #define TX_ANT_DLY 0 |
| | | #define RX_ANT_DLY 32899 |
| | |
| | | #define FINAL_MSG_FINAL_TX_TS_IDX 18 |
| | | #define FINAL_MSG_TS_LEN 4 |
| | | |
| | | #define _UWB_4G |
| | | //#define _UWB_4G |
| | | |
| | | //static dwt_config_t config = { |
| | | //#ifdef _UWB_4G |
| | | // 2, /* Channel number. */ |
| | | //#else |
| | | // 5, |
| | | //#endif |
| | | // DWT_PRF_64M, /* Pulse repetition frequency. */ |
| | | // DWT_PLEN_64, /* Preamble length. */ |
| | | // DWT_PAC8, /* Preamble acquisition chunk size. Used in RX only. */ |
| | | // 9, /* TX preamble code. Used in TX only. */ |
| | | // 9, /* RX preamble code. Used in RX only. */ |
| | | // 1, /* Use non-standard SFD (Boolean) */ |
| | | // DWT_BR_6M8, /* Data rate. */ |
| | | // DWT_PHRMODE_STD, /* PHY header mode. */ |
| | | // (65 + 8 - 8) /* SFD timeout (preamble length + 1 + SFD length - PAC size). Used in RX only. */ |
| | | //}; |
| | | |
| | | static dwt_config_t config = { |
| | | #ifdef _UWB_4G |
| | |
| | | #else |
| | | 5, |
| | | #endif |
| | | DWT_PRF_64M, /* Pulse repetition frequency. */ |
| | | DWT_PLEN_64, /* Preamble length. */ |
| | | DWT_PAC8, /* Preamble acquisition chunk size. Used in RX only. */ |
| | | 9, /* TX preamble code. Used in TX only. */ |
| | | 9, /* RX preamble code. Used in RX only. */ |
| | | 1, /* Use non-standard SFD (Boolean) */ |
| | | DWT_BR_6M8, /* Data rate. */ |
| | | DWT_PHRMODE_STD, /* PHY header mode. */ |
| | | (65 + 8 - 8) /* SFD timeout (preamble length + 1 + SFD length - PAC size). Used in RX only. */ |
| | | DWT_PLEN_64, /* Preamble length. Used in TX only. */ |
| | | DWT_PAC8, /* Preamble acquisition chunk size. Used in RX only. */ |
| | | 9, /* TX preamble code. Used in TX only. */ |
| | | 9, /* RX preamble code. Used in RX only. */ |
| | | 1, /* 0 to use standard 8 symbol SFD, 1 to use non-standard 8 symbol, 2 for non-standard 16 symbol SFD and 3 for 4z 8 symbol SDF type */ |
| | | DWT_BR_6M8, /* Data rate. */ |
| | | DWT_PHRMODE_STD, /* PHY header mode. */ |
| | | DWT_PHRRATE_STD, /* PHY header rate. */ |
| | | (65 + 8 - 8), /* SFD timeout (preamble length + 1 + SFD length - PAC size). Used in RX only. */ |
| | | DWT_STS_MODE_OFF, /* STS disabled */ |
| | | DWT_STS_LEN_64,/* STS length see allowed values in Enum dwt_sts_lengths_e */ |
| | | DWT_PDOA_M0 /* PDOA mode off */ |
| | | }; |
| | | dwt_txconfig_t txconfig_options = |
| | | { |
| | | 0x34, /* PG delay. */ |
| | | 0xfdfdfdfd, /* TX power. */ |
| | | 0x0 /*PG count*/ |
| | | }; |
| | | |
| | | dwt_txconfig_t txconfig_options_ch9 = |
| | | { |
| | | 0x34, /* PG delay. */ |
| | | 0xfefefefe, /* TX power. */ |
| | | 0x0 /*PG count*/ |
| | | }; |
| | | |
| | | static uint8_t tx_poll_msg[20] = {0}; |
| | | static uint8_t tx_sync_msg[14] = {0}; |
| | | static uint8_t tx_final_msg[60] = {0}; |
| | | static uint8_t tx_resp_msg[22] = {0}; |
| | | uint8_t tx_near_msg[80] = {0}; |
| | | |
| | | extern uint8_t module_power,imu_enable,motor_enable; |
| | | static uint32_t frame_seq_nb = 0; |
| | | static uint32_t status_reg = 0; |
| | | static uint8_t rx_buffer[100]; |
| | |
| | | *ts += ts_field[i] << (i * 8); |
| | | } |
| | | } |
| | | |
| | | uint32_t dw3000_id=0; |
| | | void Dw1000_Init(void) |
| | | { |
| | | /* Reset and initialise DW1000. |
| | | * For initialisation, DW1000 clocks must be temporarily set to crystal speed. After initialisation SPI rate can be increased for optimum |
| | | * performance. */ |
| | | Reset_DW1000();//重启DW1000 /* Target specific drive of RSTn line into DW1000 low for a period. */ |
| | | Spi_ChangePrescaler(SPIx_PRESCALER_SLOW); //设置为快速模式 |
| | | dwt_initialise(DWT_LOADUCODE);//初始化DW1000 |
| | | // Reset_DW1000();//重启DW1000 /* Target specific drive of RSTn line into DW1000 low for a period. */ |
| | | // Spi_ChangePrescaler(SPIx_PRESCALER_SLOW); //设置为快速模式 |
| | | // dwt_initialise(DWT_LOADUCODE);//初始化DW1000 |
| | | Spi_ChangePrescaler(SPIx_PRESCALER_FAST); //设置为快速模式 |
| | | Reset_DW1000();//重启DW1000 /* Target specific drive of RSTn line into DW1000 low for a period. */ |
| | | delay_ms(2); |
| | | dw3000_id=dwt_readdevid() ; |
| | | while (!dwt_checkidlerc()) /* Need to make sure DW IC is in IDLE_RC before proceeding */ |
| | | { }; |
| | | while (dwt_initialise(DWT_DW_INIT) == DWT_ERROR) |
| | | { |
| | | // _dbg_printf("INIT FAILED "); |
| | | //while (1) |
| | | { }; |
| | | delay_ms(500); |
| | | } |
| | | |
| | | // /* Configure DW1000. See NOTE 6 below. */ |
| | | // dwt_configure(&config);//配置DW1000 |
| | | if(dwt_configure(&config)) /* if the dwt_configure returns DWT_ERROR either the PLL or RX calibration has failed the host should reset the device */ |
| | | { |
| | | // _dbg_printf((unsigned char *)"CONFIG FAILED "); |
| | | while (1) |
| | | { }; |
| | | } |
| | | |
| | | /* Configure DW1000. See NOTE 6 below. */ |
| | | dwt_configure(&config);//配置DW1000 |
| | | |
| | | |
| | | |
| | | /* Configure the TX spectrum parameters (power, PG delay and PG count) */ |
| | | dwt_configuretxrf(&txconfig_options_ch9); |
| | | /* Apply default antenna delay value. See NOTE 1 below. */ |
| | | dwt_setrxantennadelay(RX_ANT_DLY); //设置接收天线延迟 |
| | | dwt_settxantennadelay(TX_ANT_DLY); //设置发射天线延迟 |
| | | |
| | | |
| | | // dwt_setrxaftertxdelay(POLL_TX_TO_RESP_RX_DLY_UUS); |
| | | // dwt_setrxtimeout(RESP_RX_TIMEOUT_UUS); |
| | | // dwt_setpreambledetecttimeout(PRE_TIMEOUT); |
| | | /* Next can enable TX/RX states output on GPIOs 5 and 6 to help debug, and also TX/RX LEDs |
| | | * Note, in real low power applications the LEDs should not be used. */ |
| | | dwt_setlnapamode(DWT_LNA_ENABLE|DWT_PA_ENABLE); |
| | | dwt_setleds(DWT_LEDS_ENABLE | DWT_LEDS_INIT_BLINK); |
| | | |
| | | /* Set expected response's delay and timeout. See NOTE 4 and 5 below. |
| | | * As this example only handles one incoming frame with always the same delay and timeout, those values can be set here once for all. */ |
| | | //设置接收超时时间 |
| | | // _dbg_printf("spi 基站 成功\n"); |
| | | } |
| | | void Dw1000_App_Init(void) |
| | | { |
| | |
| | | |
| | | } |
| | | } |
| | | extern uint8_t module_power,imu_enable,motor_enable; |
| | | |
| | | void Registor_Poll(void) |
| | | { |
| | | static u8 regpoll_count=0; |
| | |
| | | start_count=HAL_LPTIM_ReadCounter(&hlptim1); |
| | | timeout=50; |
| | | end_count=start_count+(timeout<<2); |
| | | while (!((status_reg = dwt_read32bitreg(SYS_STATUS_ID)) & (SYS_STATUS_TXFRS)))//不断查询芯片状态直到成功接收或者发生错误 |
| | | while (!((status_reg = dwt_read32bitreg(SYS_STATUS_ID)) & (SYS_STATUS_TXFRS_BIT_MASK)))//不断查询芯片状态直到成功接收或者发生错误 |
| | | { |
| | | current_count=HAL_LPTIM_ReadCounter(&hlptim1); |
| | | if(current_count>=end_count&¤t_count<end_count+15000) |
| | |
| | | while(current_count<end_count||current_count>end_count+15000) |
| | | { |
| | | current_count=HAL_LPTIM_ReadCounter(&hlptim1); |
| | | while (!((status_reg = dwt_read32bitreg(SYS_STATUS_ID)) & (SYS_STATUS_RXFCG | SYS_STATUS_ALL_RX_ERR)))//不断查询芯片状态直到成功接收或者发生错误 |
| | | while (!((status_reg = dwt_read32bitreg(SYS_STATUS_ID)) & (SYS_STATUS_RXFCG_BIT_MASK | SYS_STATUS_ALL_RX_ERR)))//不断查询芯片状态直到成功接收或者发生错误 |
| | | { |
| | | if(flag_finalsend&&flag_ancreadpara) |
| | | { |
| | |
| | | { |
| | | NVIC_SystemReset(); |
| | | } |
| | | if (status_reg & SYS_STATUS_RXFCG)//如果成功接收 |
| | | if (status_reg & SYS_STATUS_RXFCG_BIT_MASK)//如果成功接收 |
| | | { |
| | | dwt_write32bitreg(SYS_STATUS_ID, SYS_STATUS_RXFCG | SYS_STATUS_TXFRS);//清楚寄存器标志位 |
| | | frame_len = dwt_read32bitreg(RX_FINFO_ID) & RX_FINFO_RXFLEN_MASK; //获得接收到的数据长度 |
| | | dwt_write32bitreg(SYS_STATUS_ID, SYS_STATUS_RXFCG_BIT_MASK | SYS_STATUS_TXFRS_BIT_MASK);//清楚寄存器标志位 |
| | | frame_len = dwt_read32bitreg(RX_FINFO_ID) & FRAME_LEN_MAX_EX; //获得接收到的数据长度 |
| | | dwt_readrxdata(rx_buffer, frame_len, 0); //读取接收数据 |
| | | test2 = dwt_readcarrierintegrator(); |
| | | dwt_setrxtimeout(0);//DELAY_BETWEEN_TWO_FRAME_UUS*(nearbase_num+1-recbase_num)+10);//设定接收超时时间,0位没有超时时间 |
| | |
| | | } |
| | | } |
| | | }else{ |
| | | dwt_write32bitreg(SYS_STATUS_ID,SYS_STATUS_RXFCG| SYS_STATUS_ALL_RX_ERR); |
| | | dwt_write32bitreg(SYS_STATUS_ID,SYS_STATUS_RXFCG_BIT_MASK| SYS_STATUS_ALL_RX_ERR); |
| | | if(flag_rxon) |
| | | {dwt_rxenable(0); |
| | | } |
| | |
| | | // dwt_write32bitreg(SYS_STATUS_ID,SYS_STATUS_RXFCG| SYS_STATUS_ALL_RX_ERR); |
| | | } |
| | | dwt_forcetrxoff(); |
| | | dwt_write32bitreg(SYS_STATUS_ID,SYS_STATUS_RXFCG| SYS_STATUS_ALL_RX_ERR); |
| | | dwt_write32bitreg(SYS_STATUS_ID,SYS_STATUS_RXFCG_BIT_MASK| SYS_STATUS_ALL_RX_ERR); |
| | | CalculateDists(); |
| | | j = 0; |
| | | next_nearbase_num = 0; |
| | |
| | | exsistbase_list[i] = true_exsistbase_list[i]; |
| | | } |
| | | |
| | | dwt_write32bitreg(SYS_STATUS_ID, SYS_STATUS_ALL_RX_ERR| SYS_STATUS_TXFRS |SYS_STATUS_RXFCG); |
| | | dwt_write32bitreg(SYS_STATUS_ID, SYS_STATUS_ALL_RX_ERR| SYS_STATUS_TXFRS_BIT_MASK |SYS_STATUS_RXFCG_BIT_MASK); |
| | | //HAL_GPIO_WritePin(LED0_GPIO, GPIO_PIN_9, GPIO_PIN_RESET); |
| | | |
| | | if(para_update==1) |