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| | | /* Cortex-M0+ Processor Interruption and Exception Handlers */ |
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| | | /******************************************************************************/ |
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| | | /** |
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| | | * @brief This function handles Non maskable interrupt. |
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| | | * @brief This function handles Non maskable Interrupt. |
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| | | */ |
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| | | void NMI_Handler(void) |
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| | | { |
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| | |
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| | | |
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| | | /* USER CODE END EXTI0_1_IRQn 0 */ |
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| | | HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_0); |
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| | | HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_1); |
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| | | /* USER CODE BEGIN EXTI0_1_IRQn 1 */ |
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| | | //DW_DISABLE; |
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| | | /* USER CODE END EXTI0_1_IRQn 1 */ |
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| | |
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| | | /* USER CODE BEGIN EXTI2_3_IRQn 0 */ |
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| | | |
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| | | /* USER CODE END EXTI2_3_IRQn 0 */ |
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| | | HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_3); |
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| | | HAL_GPIO_EXTI_IRQHandler(RADIO_DIO1_Pin); |
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| | | /* USER CODE BEGIN EXTI2_3_IRQn 1 */ |
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| | | |
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| | | /* USER CODE END EXTI2_3_IRQn 1 */ |
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| | |
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| | | /* USER CODE BEGIN 1 */ |
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| | | |
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| | | /* USER CODE END 1 */ |
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| | | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
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