| | |
| | | #MicroXplorer Configuration settings - do not modify |
| | | ADC.IPParameters=SamplingTime |
| | | ADC.SamplingTime=ADC_SAMPLETIME_160CYCLES_5 |
| | | Dma.LPUART1_RX.4.Direction=DMA_PERIPH_TO_MEMORY |
| | | Dma.LPUART1_RX.4.Instance=DMA1_Channel6 |
| | | Dma.LPUART1_RX.4.MemDataAlignment=DMA_MDATAALIGN_BYTE |
| | | Dma.LPUART1_RX.4.MemInc=DMA_MINC_ENABLE |
| | | Dma.LPUART1_RX.4.Mode=DMA_CIRCULAR |
| | | Dma.LPUART1_RX.4.PeriphDataAlignment=DMA_PDATAALIGN_BYTE |
| | | Dma.LPUART1_RX.4.PeriphInc=DMA_PINC_DISABLE |
| | | Dma.LPUART1_RX.4.Priority=DMA_PRIORITY_LOW |
| | | Dma.LPUART1_RX.4.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority |
| | | Dma.LPUART1_TX.5.Direction=DMA_MEMORY_TO_PERIPH |
| | | Dma.LPUART1_TX.5.Instance=DMA1_Channel7 |
| | | Dma.LPUART1_TX.5.MemDataAlignment=DMA_MDATAALIGN_BYTE |
| | | Dma.LPUART1_TX.5.MemInc=DMA_MINC_ENABLE |
| | | Dma.LPUART1_TX.5.Mode=DMA_NORMAL |
| | | Dma.LPUART1_TX.5.PeriphDataAlignment=DMA_PDATAALIGN_BYTE |
| | | Dma.LPUART1_TX.5.PeriphInc=DMA_PINC_DISABLE |
| | | Dma.LPUART1_TX.5.Priority=DMA_PRIORITY_LOW |
| | | Dma.LPUART1_TX.5.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority |
| | | Dma.Request0=USART1_RX |
| | | Dma.Request1=USART1_TX |
| | | Dma.Request2=USART5_RX |
| | | Dma.Request3=USART5_TX |
| | | Dma.RequestsNb=4 |
| | | Dma.Request4=LPUART1_RX |
| | | Dma.Request5=LPUART1_TX |
| | | Dma.RequestsNb=6 |
| | | Dma.USART1_RX.0.Direction=DMA_PERIPH_TO_MEMORY |
| | | Dma.USART1_RX.0.Instance=DMA1_Channel3 |
| | | Dma.USART1_RX.0.Instance=DMA1_Channel5 |
| | | Dma.USART1_RX.0.MemDataAlignment=DMA_MDATAALIGN_BYTE |
| | | Dma.USART1_RX.0.MemInc=DMA_MINC_ENABLE |
| | | Dma.USART1_RX.0.Mode=DMA_CIRCULAR |
| | |
| | | Dma.USART1_RX.0.Priority=DMA_PRIORITY_LOW |
| | | Dma.USART1_RX.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority |
| | | Dma.USART1_TX.1.Direction=DMA_MEMORY_TO_PERIPH |
| | | Dma.USART1_TX.1.Instance=DMA1_Channel2 |
| | | Dma.USART1_TX.1.Instance=DMA1_Channel4 |
| | | Dma.USART1_TX.1.MemDataAlignment=DMA_MDATAALIGN_BYTE |
| | | Dma.USART1_TX.1.MemInc=DMA_MINC_ENABLE |
| | | Dma.USART1_TX.1.Mode=DMA_NORMAL |
| | |
| | | Dma.USART1_TX.1.Priority=DMA_PRIORITY_LOW |
| | | Dma.USART1_TX.1.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority |
| | | Dma.USART5_RX.2.Direction=DMA_PERIPH_TO_MEMORY |
| | | Dma.USART5_RX.2.Instance=DMA1_Channel6 |
| | | Dma.USART5_RX.2.Instance=DMA1_Channel2 |
| | | Dma.USART5_RX.2.MemDataAlignment=DMA_MDATAALIGN_BYTE |
| | | Dma.USART5_RX.2.MemInc=DMA_MINC_ENABLE |
| | | Dma.USART5_RX.2.Mode=DMA_CIRCULAR |
| | |
| | | Dma.USART5_RX.2.Priority=DMA_PRIORITY_LOW |
| | | Dma.USART5_RX.2.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority |
| | | Dma.USART5_TX.3.Direction=DMA_MEMORY_TO_PERIPH |
| | | Dma.USART5_TX.3.Instance=DMA1_Channel7 |
| | | Dma.USART5_TX.3.Instance=DMA1_Channel3 |
| | | Dma.USART5_TX.3.MemDataAlignment=DMA_MDATAALIGN_BYTE |
| | | Dma.USART5_TX.3.MemInc=DMA_MINC_ENABLE |
| | | Dma.USART5_TX.3.Mode=DMA_NORMAL |
| | |
| | | Mcu.UserName=STM32L071RBTx |
| | | MxCube.Version=6.5.0 |
| | | MxDb.Version=DB.6.0.50 |
| | | NVIC.DMA1_Channel2_3_IRQn=true\:1\:0\:true\:false\:true\:false\:true\:true |
| | | NVIC.DMA1_Channel2_3_IRQn=true\:0\:0\:true\:false\:true\:false\:true\:true |
| | | NVIC.DMA1_Channel4_5_6_7_IRQn=true\:0\:0\:true\:false\:true\:false\:true\:true |
| | | NVIC.EXTI0_1_IRQn=true\:2\:0\:true\:false\:true\:true\:true\:true |
| | | NVIC.EXTI4_15_IRQn=true\:0\:0\:true\:false\:true\:true\:true\:true |
| | | NVIC.ForceEnableDMAVector=true |
| | | NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true |
| | | NVIC.LPTIM1_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true |
| | | NVIC.LPUART1_IRQn=true\:1\:0\:true\:false\:true\:true\:true\:true |
| | | NVIC.LPUART1_IRQn=true\:0\:0\:true\:false\:true\:true\:true\:true |
| | | NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true |
| | | NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true |
| | | NVIC.SVC_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true |
| | |
| | | RCC.I2C3Freq_Value=32000000 |
| | | RCC.IPParameters=AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI16_VALUE,HSI_VALUE,I2C1Freq_Value,I2C3Freq_Value,LPTIMFreq_Value,LPUARTFreq_Value,LSI_VALUE,LptimClockSelection,Lpuart1ClockSelection,MCOPinFreq_Value,MSI_VALUE,PLLCLKFreq_Value,PLLMUL,PREFETCH_ENABLE,PWRFreq_Value,PWR_Regulator_Voltage_Scale,RTCFreq_Value,RTCHSEDivFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,TIMFreq_Value,TimerFreq_Value,USART1Freq_Value,USART2Freq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,WatchDogFreq_Value |
| | | RCC.LPTIMFreq_Value=32768 |
| | | RCC.LPUARTFreq_Value=32768 |
| | | RCC.LPUARTFreq_Value=16000000 |
| | | RCC.LSI_VALUE=37000 |
| | | RCC.LptimClockSelection=RCC_LPTIM1CLKSOURCE_LSE |
| | | RCC.Lpuart1ClockSelection=RCC_LPUART1CLKSOURCE_LSE |
| | | RCC.Lpuart1ClockSelection=RCC_LPUART1CLKSOURCE_HSI |
| | | RCC.MCOPinFreq_Value=32000000 |
| | | RCC.MSI_VALUE=2097000 |
| | | RCC.PLLCLKFreq_Value=32000000 |