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| | | #define MAX_RETRIES_FOR_PLL (6) |
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| | | #define MAX_RETRIES_FOR_PGF (3) |
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| | | |
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| | | //DW1000 SLEEP and WAKEUP configuration parameters |
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| | | #define DWT_PRESRV_SLEEP 0x0100 // PRES_SLEEP - on wakeup preserve sleep bit |
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| | | #define DWT_LOADOPSET 0x0080 // ONW_L64P - on wakeup load operating parameter set for 64 PSR |
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| | | #define DWT_CONFIG 0x0040 // ONW_LDC - on wakeup restore (load) the saved configurations (from AON array into HIF) |
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| | | #define DWT_TANDV 0x0001 // ONW_RADC - on wakeup run ADC to sample temperature and voltage sensor values |
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| | | |
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| | | #define DWT_XTAL_EN 0x10 // keep XTAL running during sleep |
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| | | #define DWT_WAKE_SLPCNT 0x8 // wake up after sleep count |
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| | | #define DWT_WAKE_CS 0x4 // wake up on chip select |
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| | | #define DWT_WAKE_WK 0x2 // wake up on WAKEUP PIN |
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| | | #define DWT_SLP_EN 0x1 // enable sleep/deep sleep functionality |
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| | | typedef enum |
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| | | { |
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| | | AOA, |
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| | |
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| | | DWT_SPI_CRC_MODE_WRRD /* This is used to optionally enable additional CRC check on the SPI read operations, while the CRC check on the SPI write operations is also enabled */ |
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| | | }dwt_spi_crc_mode_e; |
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| | | |
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| | | //typedef struct |
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| | | //{ |
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| | | |
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| | | // uint16_t maxNoise ; // LDE max value of noise |
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| | | // uint16_t firstPathAmp1 ; // Amplitude at floor(index FP) + 1 |
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| | | // uint16_t stdNoise ; // Standard deviation of noise |
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| | | // uint16_t firstPathAmp2 ; // Amplitude at floor(index FP) + 2 |
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| | | // uint16_t firstPathAmp3 ; // Amplitude at floor(index FP) + 3 |
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| | | // uint16_t maxGrowthCIR ; // Channel Impulse Response max growth CIR |
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| | | // uint16_t rxPreamCount ; // Count of preamble symbols accumulated |
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| | | // //uint32_t debug1; |
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| | | // //uint32_t debug2; |
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| | | // uint16_t firstPath ; // First path index (10.6 bits fixed point integer) |
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| | | //} dwt_rxdiag_t ; |
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| | | |
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| | | // Defined constants for "mode" bit field parameter passed to dwt_setleds() function. |
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| | | #define DWT_LEDS_DISABLE 0x00 |
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