| | |
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| | | #define VBAT_ADDRESS (0x08) |
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| | | #define VTEMP_ADDRESS (0x09) |
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| | | #define XTRIM_ADDRESS (0x1E) |
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| | | |
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| | | uint8_t module_power; |
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| | | uint32_t power_temp,power_input; |
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| | | extern u32 id,error_times; |
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| | | u8 errortimes; |
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| | | int dwt_initialise(uint16_t config) |
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| | | { |
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| | | |
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| | | uint8_t plllockdetect = EC_CTRL_PLLLCK; |
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| | | uint16_t otp_addr = 0; |
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| | | uint32_t ldo_tune = 0; |
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| | |
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| | | dw1000local.deviceID = dwt_readdevid() ; |
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| | | while (DWT_DEVICE_ID != dw1000local.deviceID) // MP IC ONLY (i.e. DW1000) FOR THIS CODE |
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| | | { |
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| | | if(errortimes++>10) |
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| | | break; |
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| | | dw1000local.deviceID = dwt_readdevid() ; |
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| | | } |
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| | | |
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| | | id = dwt_readdevid() ; |
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| | | _dwt_enableclocks(FORCE_SYS_XTI); // NOTE: set system clock to XTI - this is necessary to make sure the values read by _dwt_otpread are reliable |
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| | | dwt_write32bitreg(TX_POWER_ID, 0x1f1f1f1f); |
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| | | dw1000local.deviceID = dwt_readdevid() ; |
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| | | if(module_power>36) |
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| | | { |
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| | | power_temp =(module_power-36); |
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| | | }else{ |
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| | | power_temp = ((6-(module_power/6))<<5)|(module_power%6); |
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| | | } |
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| | | power_input= power_temp<<24|power_temp<<16|power_temp<<8|power_temp; |
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| | | dwt_write32bitreg(TX_POWER_ID, power_input); |
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| | | dw1000local.deviceID = dwt_readdevid() ; |
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| | | // Configure the CPLL lock detect |
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| | | dwt_writetodevice(EXT_SYNC_ID, EC_CTRL_OFFSET, 1, &plllockdetect); |
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| | | // Read OTP revision number |
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| | |
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| | | dw1000local.otprev = (otp_addr >> 8) & 0xff; // OTP revision is next byte |
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| | | // Load LDO tune from OTP and kick it if there is a value actually programmed. |
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| | | ldo_tune = _dwt_otpread(LDOTUNE_ADDRESS); |
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| | | dw1000local.deviceID = dwt_readdevid() ; |
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| | | if((ldo_tune & 0xFF) != 0) |
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| | | { |
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| | | uint8_t ldok = OTP_SF_LDO_KICK; |
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| | |
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| | | //diagnostics->debug2 = dwt_read32bitoffsetreg(0x27, 0xc); |
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| | | |
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| | | } |
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| | | #define B20_SIGN_EXTEND_TEST (0x00100000UL) |
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| | | #define B20_SIGN_EXTEND_MASK (0xFFF00000UL) |
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| | | /* offset from DRX_CONF_ID in bytes to 21-bit signed RX carrier integrator value */ |
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| | | #define DRX_CARRIER_INT_OFFSET 0x28 |
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| | | #define DRX_CARRIER_INT_LEN (3) |
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| | | #define DRX_CARRIER_INT_MASK 0x001FFFFF |
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| | | int32_t dwt_readcarrierintegrator(void) |
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| | | { |
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| | | uint32_t regval = 0 ; |
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| | | int j ; |
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| | | uint8_t buffer[DRX_CARRIER_INT_LEN] ; |
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| | | |
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| | | /* Read 3 bytes into buffer (21-bit quantity) */ |
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| | | |
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| | | dwt_readfromdevice(DRX_CONF_ID,DRX_CARRIER_INT_OFFSET,DRX_CARRIER_INT_LEN, buffer) ; |
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| | | |
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| | | for (j = 2 ; j >= 0 ; j --) // arrange the three bytes into an unsigned integer value |
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| | | { |
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| | | regval = (regval << 8) + buffer[j] ; |
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| | | } |
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| | | |
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| | | if (regval & B20_SIGN_EXTEND_TEST) regval |= B20_SIGN_EXTEND_MASK ; // sign extend bit #20 to whole word |
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| | | else regval &= DRX_CARRIER_INT_MASK ; // make sure upper bits are clear if not sign extending |
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| | | |
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| | | return (int32_t) regval ; // cast unsigned value to signed quantity. |
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| | | } |
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| | | /*! ------------------------------------------------------------------------------------------------------------------ |
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| | | * @fn dwt_readtxtimestamp() |
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| | | * |
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| | |
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| | | dw1000local.sysCFGreg |= SYS_CFG_AUTOACK; |
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| | | dwt_write32bitreg(SYS_CFG_ID, dw1000local.sysCFGreg) ; |
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| | | } |
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| | | |
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| | | void dwt_enableautorxeanble(uint8_t enable) |
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| | | { |
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| | | // Set auto ACK reply delay |
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| | | |
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| | | // Enable auto ACK |
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| | | if(enable) |
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| | | { |
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| | | dw1000local.sysCFGreg |= SYS_CFG_RXAUTR; |
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| | | }else{ |
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| | | dw1000local.sysCFGreg&=0xDFFFFFFF; |
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| | | } |
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| | | dwt_write32bitreg(SYS_CFG_ID, dw1000local.sysCFGreg) ; |
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| | | } |
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| | | /*! ------------------------------------------------------------------------------------------------------------------ |
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| | | * @fn dwt_setdblrxbuffmode() |
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| | | * |
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