| | |
| | | #MicroXplorer Configuration settings - do not modify |
| | | ADC.IPParameters=SamplingTime |
| | | ADC.SamplingTime=ADC_SAMPLETIME_160CYCLES_5 |
| | | Dma.LPUART1_RX.4.Direction=DMA_PERIPH_TO_MEMORY |
| | | Dma.LPUART1_RX.4.Instance=DMA1_Channel6 |
| | | Dma.LPUART1_RX.4.MemDataAlignment=DMA_MDATAALIGN_BYTE |
| | | Dma.LPUART1_RX.4.MemInc=DMA_MINC_ENABLE |
| | | Dma.LPUART1_RX.4.Mode=DMA_CIRCULAR |
| | | Dma.LPUART1_RX.4.PeriphDataAlignment=DMA_PDATAALIGN_BYTE |
| | | Dma.LPUART1_RX.4.PeriphInc=DMA_PINC_DISABLE |
| | | Dma.LPUART1_RX.4.Priority=DMA_PRIORITY_LOW |
| | | Dma.LPUART1_RX.4.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority |
| | | Dma.LPUART1_TX.5.Direction=DMA_MEMORY_TO_PERIPH |
| | | Dma.LPUART1_TX.5.Instance=DMA1_Channel7 |
| | | Dma.LPUART1_TX.5.MemDataAlignment=DMA_MDATAALIGN_BYTE |
| | | Dma.LPUART1_TX.5.MemInc=DMA_MINC_ENABLE |
| | | Dma.LPUART1_TX.5.Mode=DMA_NORMAL |
| | | Dma.LPUART1_TX.5.PeriphDataAlignment=DMA_PDATAALIGN_BYTE |
| | | Dma.LPUART1_TX.5.PeriphInc=DMA_PINC_DISABLE |
| | | Dma.LPUART1_TX.5.Priority=DMA_PRIORITY_LOW |
| | | Dma.LPUART1_TX.5.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority |
| | | Dma.LPUART1_RX.2.Direction=DMA_PERIPH_TO_MEMORY |
| | | Dma.LPUART1_RX.2.Instance=DMA1_Channel6 |
| | | Dma.LPUART1_RX.2.MemDataAlignment=DMA_MDATAALIGN_BYTE |
| | | Dma.LPUART1_RX.2.MemInc=DMA_MINC_ENABLE |
| | | Dma.LPUART1_RX.2.Mode=DMA_CIRCULAR |
| | | Dma.LPUART1_RX.2.PeriphDataAlignment=DMA_PDATAALIGN_BYTE |
| | | Dma.LPUART1_RX.2.PeriphInc=DMA_PINC_DISABLE |
| | | Dma.LPUART1_RX.2.Priority=DMA_PRIORITY_LOW |
| | | Dma.LPUART1_RX.2.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority |
| | | Dma.LPUART1_TX.3.Direction=DMA_MEMORY_TO_PERIPH |
| | | Dma.LPUART1_TX.3.Instance=DMA1_Channel7 |
| | | Dma.LPUART1_TX.3.MemDataAlignment=DMA_MDATAALIGN_BYTE |
| | | Dma.LPUART1_TX.3.MemInc=DMA_MINC_ENABLE |
| | | Dma.LPUART1_TX.3.Mode=DMA_NORMAL |
| | | Dma.LPUART1_TX.3.PeriphDataAlignment=DMA_PDATAALIGN_BYTE |
| | | Dma.LPUART1_TX.3.PeriphInc=DMA_PINC_DISABLE |
| | | Dma.LPUART1_TX.3.Priority=DMA_PRIORITY_LOW |
| | | Dma.LPUART1_TX.3.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority |
| | | Dma.Request0=USART1_RX |
| | | Dma.Request1=USART1_TX |
| | | Dma.Request2=USART5_RX |
| | | Dma.Request3=USART5_TX |
| | | Dma.Request4=LPUART1_RX |
| | | Dma.Request5=LPUART1_TX |
| | | Dma.RequestsNb=6 |
| | | Dma.Request2=LPUART1_RX |
| | | Dma.Request3=LPUART1_TX |
| | | Dma.RequestsNb=4 |
| | | Dma.USART1_RX.0.Direction=DMA_PERIPH_TO_MEMORY |
| | | Dma.USART1_RX.0.Instance=DMA1_Channel5 |
| | | Dma.USART1_RX.0.Instance=DMA1_Channel3 |
| | | Dma.USART1_RX.0.MemDataAlignment=DMA_MDATAALIGN_BYTE |
| | | Dma.USART1_RX.0.MemInc=DMA_MINC_ENABLE |
| | | Dma.USART1_RX.0.Mode=DMA_CIRCULAR |
| | |
| | | Dma.USART1_RX.0.Priority=DMA_PRIORITY_LOW |
| | | Dma.USART1_RX.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority |
| | | Dma.USART1_TX.1.Direction=DMA_MEMORY_TO_PERIPH |
| | | Dma.USART1_TX.1.Instance=DMA1_Channel4 |
| | | Dma.USART1_TX.1.Instance=DMA1_Channel2 |
| | | Dma.USART1_TX.1.MemDataAlignment=DMA_MDATAALIGN_BYTE |
| | | Dma.USART1_TX.1.MemInc=DMA_MINC_ENABLE |
| | | Dma.USART1_TX.1.Mode=DMA_NORMAL |
| | |
| | | Dma.USART1_TX.1.PeriphInc=DMA_PINC_DISABLE |
| | | Dma.USART1_TX.1.Priority=DMA_PRIORITY_LOW |
| | | Dma.USART1_TX.1.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority |
| | | Dma.USART5_RX.2.Direction=DMA_PERIPH_TO_MEMORY |
| | | Dma.USART5_RX.2.Instance=DMA1_Channel2 |
| | | Dma.USART5_RX.2.MemDataAlignment=DMA_MDATAALIGN_BYTE |
| | | Dma.USART5_RX.2.MemInc=DMA_MINC_ENABLE |
| | | Dma.USART5_RX.2.Mode=DMA_CIRCULAR |
| | | Dma.USART5_RX.2.PeriphDataAlignment=DMA_PDATAALIGN_BYTE |
| | | Dma.USART5_RX.2.PeriphInc=DMA_PINC_DISABLE |
| | | Dma.USART5_RX.2.Priority=DMA_PRIORITY_LOW |
| | | Dma.USART5_RX.2.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority |
| | | Dma.USART5_TX.3.Direction=DMA_MEMORY_TO_PERIPH |
| | | Dma.USART5_TX.3.Instance=DMA1_Channel3 |
| | | Dma.USART5_TX.3.MemDataAlignment=DMA_MDATAALIGN_BYTE |
| | | Dma.USART5_TX.3.MemInc=DMA_MINC_ENABLE |
| | | Dma.USART5_TX.3.Mode=DMA_NORMAL |
| | | Dma.USART5_TX.3.PeriphDataAlignment=DMA_PDATAALIGN_BYTE |
| | | Dma.USART5_TX.3.PeriphInc=DMA_PINC_DISABLE |
| | | Dma.USART5_TX.3.Priority=DMA_PRIORITY_LOW |
| | | Dma.USART5_TX.3.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority |
| | | File.Version=6 |
| | | GPIO.groupedBy=Group By Peripherals |
| | | IWDG.IPParameters=Prescaler |
| | |
| | | Mcu.UserName=STM32L071RBTx |
| | | MxCube.Version=6.5.0 |
| | | MxDb.Version=DB.6.0.50 |
| | | NVIC.DMA1_Channel2_3_IRQn=true\:0\:0\:true\:false\:true\:false\:true\:true |
| | | NVIC.DMA1_Channel2_3_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true |
| | | NVIC.DMA1_Channel4_5_6_7_IRQn=true\:0\:0\:true\:false\:true\:false\:true\:true |
| | | NVIC.EXTI0_1_IRQn=true\:2\:0\:true\:false\:true\:true\:true\:true |
| | | NVIC.EXTI4_15_IRQn=true\:0\:0\:true\:false\:true\:true\:true\:true |
| | | NVIC.ForceEnableDMAVector=true |
| | | NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true |
| | | NVIC.LPTIM1_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true |
| | | NVIC.LPUART1_IRQn=true\:0\:0\:true\:false\:true\:true\:true\:true |
| | | NVIC.LPUART1_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true |
| | | NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true |
| | | NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true |
| | | NVIC.SVC_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true |
| | | NVIC.SysTick_IRQn=true\:0\:0\:true\:false\:true\:false\:true\:true |
| | | NVIC.USART1_IRQn=true\:1\:0\:true\:false\:true\:true\:true\:true |
| | | NVIC.USART4_5_IRQn=true\:2\:0\:true\:false\:true\:true\:true\:true |
| | | PA0.Locked=true |
| | | PA0.Signal=GPXTI0 |
| | | PA1.Mode=IN1 |
| | |
| | | PC11.GPIO_Label=RADIO_BUSY |
| | | PC11.Locked=true |
| | | PC11.Signal=GPIO_Input |
| | | PC12.GPIOParameters=GPIO_PuPd |
| | | PC12.GPIO_PuPd=GPIO_NOPULL |
| | | PC12.Mode=Asynchronous |
| | | PC12.Signal=USART5_TX |
| | | PC13.Locked=true |
| | |
| | | PC7.Signal=GPIO_Output |
| | | PC8.Locked=true |
| | | PC8.Signal=GPIO_Output |
| | | PD2.GPIOParameters=GPIO_PuPd |
| | | PD2.GPIO_PuPd=GPIO_NOPULL |
| | | PD2.Mode=Asynchronous |
| | | PD2.Signal=USART5_RX |
| | | PH0-OSC_IN.Mode=HSE-External-Oscillator |
| | |
| | | ProjectManager.TargetToolchain=MDK-ARM V5.27 |
| | | ProjectManager.ToolChainLocation= |
| | | ProjectManager.UnderRoot=false |
| | | ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_DMA_Init-DMA-false-HAL-true,4-MX_ADC_Init-ADC-false-HAL-true,5-MX_IWDG_Init-IWDG-false-HAL-true,6-MX_LPTIM1_Init-LPTIM1-false-HAL-true,7-MX_LPUART1_UART_Init-LPUART1-false-HAL-true,8-MX_USART1_UART_Init-USART1-false-HAL-true,9-MX_SPI1_Init-SPI1-false-HAL-true,10-MX_USART5_UART_Init-USART5-false-HAL-true |
| | | ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_DMA_Init-DMA-false-HAL-true,4-MX_ADC_Init-ADC-false-HAL-true,5-MX_IWDG_Init-IWDG-false-HAL-true,6-MX_LPTIM1_Init-LPTIM1-false-HAL-true,7-MX_USART1_UART_Init-USART1-false-HAL-true,8-MX_SPI1_Init-SPI1-false-HAL-true,9-MX_LPUART1_UART_Init-LPUART1-false-HAL-true |
| | | RCC.AHBFreq_Value=32000000 |
| | | RCC.APB1Freq_Value=32000000 |
| | | RCC.APB1TimFreq_Value=32000000 |