| | |
| | | #include "deca_version.h" |
| | | //#include "uwb.h" |
| | | #include "stm32l0xx_hal.h" |
| | | //#include "stm32f4xx_hal.h" |
| | | uint8_t module_power; |
| | | #define Sleep(a) delay_ms(a); |
| | | uint8_t module_power; |
| | | #define deca_sleep(a) delay_ms(a); |
| | | #define deca_usleep(a) delay_us(a); |
| | | dwt_rxdiag_t rx_diag; |
| | | // --------------------------------------------------------------------------- |
| | | // |
| | | // NB: The purpose of this file is to provide for microprocessor interrupt enable/disable, this is used for |
| | |
| | | dwt_write16bitoffsetreg(DTUNE1_ID, 0, timeout); |
| | | } |
| | | |
| | | ///*! ------------------------------------------------------------------------------------------------------------------ |
| | | // * @brief This function enables the specified events to trigger an interrupt. |
| | | // * The following events can be found in SYS_ENABLE_LO and SYS_ENABLE_HI registers. |
| | | // * |
| | | // * |
| | | // * input parameters: |
| | | // * @param bitmask_lo - sets the events in SYS_ENABLE_LO_ID register which will generate interrupt |
| | | // * @param bitmask_hi - sets the events in SYS_ENABLE_HI_ID register which will generate interrupt |
| | | // * @param operation - if set to DWT_ENABLE_INT additional interrupts as selected in the bitmask are enabled |
| | | // * - if set to DWT_ENABLE_INT_ONLY the interrupts in the bitmask are forced to selected state - |
| | | // * i.e. the mask is written to the register directly. |
| | | // * - otherwise (if set to DWT_DISABLE_INT) clear the interrupts as selected in the bitmask |
| | | // * output parameters |
| | | // * |
| | | // * no return value |
| | | // */ |
| | | //void dwt_setinterrupt(uint32_t bitmask_lo, uint32_t bitmask_hi, dwt_INT_options_e INT_options) |
| | | //{ |
| | | // decaIrqStatus_t stat ; |
| | | |
| | | // // Need to beware of interrupts occurring in the middle of following read modify write cycle |
| | | // stat = decamutexon(); |
| | | |
| | | // if(INT_options == DWT_ENABLE_INT_ONLY) |
| | | // { |
| | | // dwt_write32bitreg(SYS_ENABLE_LO_ID, bitmask_lo); // New value |
| | | // dwt_write32bitreg(SYS_ENABLE_HI_ID, bitmask_hi); // New value |
| | | // } |
| | | // else |
| | | // { |
| | | // if(INT_options == DWT_ENABLE_INT) |
| | | // { |
| | | // dwt_or32bitoffsetreg(SYS_ENABLE_LO_ID, 0, bitmask_lo); //Set the bits |
| | | // dwt_or32bitoffsetreg(SYS_ENABLE_HI_ID, 0, bitmask_hi); //Set the bits |
| | | // } |
| | | // else |
| | | // { |
| | | // dwt_and32bitoffsetreg(SYS_ENABLE_LO_ID, 0, (uint32_t)(~bitmask_lo)); // Clear the bits |
| | | // dwt_and32bitoffsetreg(SYS_ENABLE_HI_ID, 0, (uint32_t)(~bitmask_hi)); // Clear the bits |
| | | // } |
| | | // } |
| | | |
| | | // decamutexoff(stat); |
| | | //} |
| | | /*! ------------------------------------------------------------------------------------------------------------------ |
| | | * @brief This function enables the specified events to trigger an interrupt. |
| | | * The following events can be found in SYS_ENABLE_LO and SYS_ENABLE_HI registers. |
| | |
| | | * |
| | | * no return value |
| | | */ |
| | | void dwt_setinterrupt(uint32_t bitmask_lo, uint32_t bitmask_hi, dwt_INT_options_e INT_options) |
| | | void dwt_setinterrupt(uint32_t bitmask_lo, dwt_INT_options_e INT_options) |
| | | { |
| | | decaIrqStatus_t stat ; |
| | | |
| | |
| | | if(INT_options == DWT_ENABLE_INT_ONLY) |
| | | { |
| | | dwt_write32bitreg(SYS_ENABLE_LO_ID, bitmask_lo); // New value |
| | | dwt_write32bitreg(SYS_ENABLE_HI_ID, bitmask_hi); // New value |
| | | dwt_write32bitreg(SYS_ENABLE_HI_ID, 0); // New value |
| | | } |
| | | else |
| | | { |
| | | if(INT_options == DWT_ENABLE_INT) |
| | | { |
| | | dwt_or32bitoffsetreg(SYS_ENABLE_LO_ID, 0, bitmask_lo); //Set the bits |
| | | dwt_or32bitoffsetreg(SYS_ENABLE_HI_ID, 0, bitmask_hi); //Set the bits |
| | | dwt_or32bitoffsetreg(SYS_ENABLE_HI_ID, 0, 0); //Set the bits |
| | | } |
| | | else |
| | | { |
| | | dwt_and32bitoffsetreg(SYS_ENABLE_LO_ID, 0, (uint32_t)(~bitmask_lo)); // Clear the bits |
| | | dwt_and32bitoffsetreg(SYS_ENABLE_HI_ID, 0, (uint32_t)(~bitmask_hi)); // Clear the bits |
| | | dwt_and32bitoffsetreg(SYS_ENABLE_HI_ID, 0, (uint32_t)(~0)); // Clear the bits |
| | | } |
| | | } |
| | | |
| | | decamutexoff(stat); |
| | | } |
| | | |
| | | /*! ------------------------------------------------------------------------------------------------------------------ |
| | | * @brief This is used to enable/disable the event counter in the IC |
| | | * |