| | |
| | | |
| | | //void Rcc_Init(void) |
| | | //{ |
| | | // //----------使用内部RC晶振HSI 64MHz----------- |
| | | // RCC_DeInit(); //将外设RCC寄存器重设为缺省值 |
| | | // //----------使用内部RC晶振HSI 64MHz----------- |
| | | // RCC_DeInit(); //将外设RCC寄存器重设为缺省值 |
| | | // RCC_HSICmd(ENABLE); //内部时钟使能 |
| | | // while(RCC_GetFlagStatus(RCC_FLAG_HSIRDY)== RESET); //等待HSI就绪 |
| | | // |
| | | // FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable); //选择FLASH预取指缓存的模,预取指缓存使能 |
| | | // FLASH_SetLatency(FLASH_Latency_2); //设置FLASH存储器延时时钟周期数FLASH_Latency_2 2延时周期 |
| | | // |
| | | // |
| | | // RCC_HCLKConfig(RCC_SYSCLK_Div1); //设置AHB时钟(HCLK) RCC_SYSCLK_Div1——AHB时钟 = 系统时钟 |
| | | // RCC_PCLK2Config(RCC_HCLK_Div1); //设置高速AHB时钟(PCLK2)RCC_HCLK_Div1——APB2时钟 = HCLK |
| | | // RCC_PCLK1Config(RCC_HCLK_Div2); //设置低速AHB时钟(PCLK1)RCC_HCLK_Div2——APB1时钟 = HCLK/2 |
| | | // RCC_PLLConfig(RCC_PLLSource_HSI_Div2, RCC_PLLMul_16); //设置PLL时钟源及倍频系数,频率为8/2*16=64Mhz |
| | | // RCC_PLLCmd(ENABLE); //使能PLL |
| | | // |
| | | // while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET); //检查指定的RCC标志位(PLL准备好标志)设置与否 |
| | | // RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); //设置系统时钟(SYSCLK) |
| | | // while(RCC_GetSYSCLKSource() != 0x08); //0x08:PLL作为系统时钟 |
| | | // while(RCC_GetFlagStatus(RCC_FLAG_HSIRDY)== RESET); //等待HSI就绪 |
| | | // |
| | | // FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable); //选择FLASH预取指缓存的模,预取指缓存使能 |
| | | // FLASH_SetLatency(FLASH_Latency_2); //设置FLASH存储器延时时钟周期数FLASH_Latency_2 2延时周期 |
| | | // |
| | | // |
| | | // RCC_HCLKConfig(RCC_SYSCLK_Div1); //设置AHB时钟(HCLK) RCC_SYSCLK_Div1——AHB时钟 = 系统时钟 |
| | | // RCC_PCLK2Config(RCC_HCLK_Div1); //设置高速AHB时钟(PCLK2)RCC_HCLK_Div1——APB2时钟 = HCLK |
| | | // RCC_PCLK1Config(RCC_HCLK_Div2); //设置低速AHB时钟(PCLK1)RCC_HCLK_Div2——APB1时钟 = HCLK/2 |
| | | // RCC_PLLConfig(RCC_PLLSource_HSI_Div2, RCC_PLLMul_16); //设置PLL时钟源及倍频系数,频率为8/2*16=64Mhz |
| | | // RCC_PLLCmd(ENABLE); //使能PLL |
| | | // |
| | | // while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET); //检查指定的RCC标志位(PLL准备好标志)设置与否 |
| | | // RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); //设置系统时钟(SYSCLK) |
| | | // while(RCC_GetSYSCLKSource() != 0x08); //0x08:PLL作为系统时钟 |
| | | |
| | | //// //----------使用外部RC晶振 72MHz----------- |
| | | //// RCC_DeInit(); //初始化为缺省值 |
| | | //// RCC_HSEConfig(RCC_HSE_ON); //使能外部的高速时钟 |
| | | //// while(RCC_GetFlagStatus(RCC_FLAG_HSERDY) == RESET); //等待外部高速时钟使能就绪 |
| | | //// |
| | | //// FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable); //Enable Prefetch Buffer |
| | | //// FLASH_SetLatency(FLASH_Latency_2); //Flash 2 wait state |
| | | //// |
| | | //// RCC_HCLKConfig(RCC_SYSCLK_Div1); //HCLK = SYSCLK |
| | | //// RCC_PCLK2Config(RCC_HCLK_Div1); //PCLK2 = HCLK |
| | | //// RCC_PCLK1Config(RCC_HCLK_Div2); //PCLK1 = HCLK/2 |
| | | //// RCC_PLLConfig(RCC_PLLSource_HSE_Div1,RCC_PLLMul_9); //PLLCLK = 8MHZ * 9 =72MHZ |
| | | //// RCC_PLLCmd(ENABLE); //Enable PLLCLK |
| | | //// |
| | | //// while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET); //Wait till PLLCLK is ready |
| | | //// RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); //Select PLL as system clock |
| | | //// while(RCC_GetSYSCLKSource()!=0x08); //Wait till PLL is used as system clock source |
| | | // |
| | | //// //----------使用外部RC晶振 72MHz----------- |
| | | //// RCC_DeInit(); //初始化为缺省值 |
| | | //// RCC_HSEConfig(RCC_HSE_ON); //使能外部的高速时钟 |
| | | //// while(RCC_GetFlagStatus(RCC_FLAG_HSERDY) == RESET); //等待外部高速时钟使能就绪 |
| | | //// |
| | | //// FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable); //Enable Prefetch Buffer |
| | | //// FLASH_SetLatency(FLASH_Latency_2); //Flash 2 wait state |
| | | //// |
| | | //// RCC_HCLKConfig(RCC_SYSCLK_Div1); //HCLK = SYSCLK |
| | | //// RCC_PCLK2Config(RCC_HCLK_Div1); //PCLK2 = HCLK |
| | | //// RCC_PCLK1Config(RCC_HCLK_Div2); //PCLK1 = HCLK/2 |
| | | //// RCC_PLLConfig(RCC_PLLSource_HSE_Div1,RCC_PLLMul_9); //PLLCLK = 8MHZ * 9 =72MHZ |
| | | //// RCC_PLLCmd(ENABLE); //Enable PLLCLK |
| | | //// |
| | | //// while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET); //Wait till PLLCLK is ready |
| | | //// RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); //Select PLL as system clock |
| | | //// while(RCC_GetSYSCLKSource()!=0x08); //Wait till PLL is used as system clock source |
| | | // |
| | | //} |
| | | int RCC_Configuration(void) |
| | | { |
| | | ErrorStatus HSEStartUpStatus; |
| | | RCC_ClocksTypeDef RCC_ClockFreq; |
| | | ErrorStatus HSEStartUpStatus; |
| | | RCC_ClocksTypeDef RCC_ClockFreq; |
| | | |
| | | /* RCC system reset(for debug purpose) */ |
| | | RCC_DeInit(); |
| | | /* RCC system reset(for debug purpose) */ |
| | | RCC_DeInit(); |
| | | |
| | | /* Enable HSE */ |
| | | RCC_HSEConfig(RCC_HSE_ON); |
| | | /* Enable HSE */ |
| | | RCC_HSEConfig(RCC_HSE_ON); |
| | | |
| | | /* Wait till HSE is ready */ |
| | | HSEStartUpStatus = RCC_WaitForHSEStartUp(); |
| | | /* Wait till HSE is ready */ |
| | | HSEStartUpStatus = RCC_WaitForHSEStartUp(); |
| | | |
| | | if(HSEStartUpStatus != ERROR) |
| | | { |
| | | SystemInit(); |
| | | /* Enable Prefetch Buffer */ |
| | | FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable); |
| | | if(HSEStartUpStatus != ERROR) |
| | | { |
| | | SystemInit(); |
| | | /* Enable Prefetch Buffer */ |
| | | FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable); |
| | | |
| | | /****************************************************************/ |
| | | /* HSE= up to 25MHz (on EVB1000 is 12MHz), |
| | | * HCLK=72MHz, PCLK2=72MHz, PCLK1=36MHz */ |
| | | /****************************************************************/ |
| | | /* Flash 2 wait state */ |
| | | FLASH_SetLatency(FLASH_Latency_2); |
| | | /* HCLK = SYSCLK */ |
| | | RCC_HCLKConfig(RCC_SYSCLK_Div1); |
| | | /* PCLK2 = HCLK */ |
| | | RCC_PCLK2Config(RCC_HCLK_Div1); |
| | | /* PCLK1 = HCLK/2 */ |
| | | RCC_PCLK1Config(RCC_HCLK_Div2); |
| | | /* ADCCLK = PCLK2/4 */ |
| | | RCC_ADCCLKConfig(RCC_PCLK2_Div6); |
| | | } |
| | | /****************************************************************/ |
| | | /* HSE= up to 25MHz (on EVB1000 is 12MHz), |
| | | * HCLK=72MHz, PCLK2=72MHz, PCLK1=36MHz */ |
| | | /****************************************************************/ |
| | | /* Flash 2 wait state */ |
| | | FLASH_SetLatency(FLASH_Latency_2); |
| | | /* HCLK = SYSCLK */ |
| | | RCC_HCLKConfig(RCC_SYSCLK_Div1); |
| | | /* PCLK2 = HCLK */ |
| | | RCC_PCLK2Config(RCC_HCLK_Div1); |
| | | /* PCLK1 = HCLK/2 */ |
| | | RCC_PCLK1Config(RCC_HCLK_Div2); |
| | | /* ADCCLK = PCLK2/4 */ |
| | | RCC_ADCCLKConfig(RCC_PCLK2_Div6); |
| | | } |
| | | // /* Configure PLLs *********************************************************/ |
| | | // /* PLL2 configuration: PLL2CLK = (HSE / 4) * 8 = 24 MHz */ |
| | | // RCC_PREDIV2Config(RCC_PREDIV2_Div4); |
| | |
| | | // while (RCC_GetSYSCLKSource() != 0x08){} |
| | | // } |
| | | |
| | | RCC_GetClocksFreq(&RCC_ClockFreq); |
| | | RCC_GetClocksFreq(&RCC_ClockFreq); |
| | | |
| | | /* Enable SPI1 clock */ |
| | | RCC_APB2PeriphClockCmd(RCC_APB2Periph_SPI1, ENABLE); |
| | | /* Enable SPI1 clock */ |
| | | RCC_APB2PeriphClockCmd(RCC_APB2Periph_SPI1, ENABLE); |
| | | |
| | | /* Enable SPI2 clock */ |
| | | RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2, ENABLE); |
| | | /* Enable SPI2 clock */ |
| | | RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2, ENABLE); |
| | | |
| | | /* Enable GPIOs clocks */ |
| | | RCC_APB2PeriphClockCmd( |
| | | RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB | |
| | | RCC_APB2Periph_GPIOC | RCC_APB2Periph_GPIOD | |
| | | RCC_APB2Periph_GPIOE | RCC_APB2Periph_AFIO, |
| | | ENABLE); |
| | | /* Enable GPIOs clocks */ |
| | | RCC_APB2PeriphClockCmd( |
| | | RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB | |
| | | RCC_APB2Periph_GPIOC | RCC_APB2Periph_GPIOD | |
| | | RCC_APB2Periph_GPIOE | RCC_APB2Periph_AFIO, |
| | | ENABLE); |
| | | |
| | | return 0; |
| | | return 0; |
| | | } |
| | | void Nvic_Init(void) |
| | | { |
| | | NVIC_InitTypeDef NVIC_InitStructure; |
| | | |
| | | NVIC_PriorityGroupConfig(NVIC_PriorityGroup_4); |
| | | |
| | | /* Enable and set EXTI Interrupt to the lowest priority */ |
| | | NVIC_InitTypeDef NVIC_InitStructure; |
| | | |
| | | NVIC_PriorityGroupConfig(NVIC_PriorityGroup_4); |
| | | |
| | | /* Enable and set EXTI Interrupt to the lowest priority */ |
| | | NVIC_InitStructure.NVIC_IRQChannel = DECAIRQ_EXTI_IRQn; |
| | | NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 15; |
| | | NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; |
| | | NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; |
| | | |
| | | NVIC_InitStructure.NVIC_IRQChannel = USART1_IRQn; |
| | | NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; |
| | | NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; |
| | | NVIC_Init(&NVIC_InitStructure); |
| | | |
| | | NVIC_InitStructure.NVIC_IRQChannel = RTCAlarm_IRQn; |
| | | NVIC_InitStructure.NVIC_IRQChannel = USART1_IRQn; |
| | | NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; |
| | | NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; |
| | | NVIC_Init(&NVIC_InitStructure); |
| | | |
| | | NVIC_InitStructure.NVIC_IRQChannel = RTCAlarm_IRQn; |
| | | NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; |
| | | NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; |
| | | NVIC_InitStructure.NVIC_IRQChannelCmd =ENABLE; |
| | | |
| | | NVIC_InitStructure.NVIC_IRQChannelCmd =ENABLE; |
| | | |
| | | NVIC_Init(&NVIC_InitStructure); |
| | | } |
| | | //?????3????? |
| | |
| | | void TIM3_Int_Init(void) |
| | | { |
| | | TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure; |
| | | NVIC_InitTypeDef NVIC_InitStructure; |
| | | |
| | | RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3, ENABLE); //???? |
| | | |
| | | //???TIM3??? |
| | | TIM_TimeBaseStructure.TIM_Period = 1000-1; //??????????????????????????? |
| | | TIM_TimeBaseStructure.TIM_Prescaler =72-1; //??????TIMx??????????? |
| | | TIM_TimeBaseStructure.TIM_ClockDivision = TIM_CKD_DIV1; //??????:TDTS = Tck_tim |
| | | TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; //TIM?????? |
| | | TIM_TimeBaseInit(TIM3, &TIM_TimeBaseStructure); //??????????TIMx??????? |
| | | |
| | | TIM_ITConfig(TIM3,TIM_IT_Update,ENABLE ); //?????TIM3??,?????? |
| | | |
| | | //?????NVIC?? |
| | | NVIC_InitStructure.NVIC_IRQChannel = TIM3_IRQn; //TIM3?? |
| | | NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; //?????0? |
| | | NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; //????3? |
| | | NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; //IRQ????? |
| | | NVIC_Init(&NVIC_InitStructure); //???NVIC??? |
| | | |
| | | |
| | | TIM_Cmd(TIM3, ENABLE); //??TIMx |
| | | NVIC_InitTypeDef NVIC_InitStructure; |
| | | |
| | | RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3, ENABLE); //???? |
| | | |
| | | //???TIM3??? |
| | | TIM_TimeBaseStructure.TIM_Period = 1000-1; //??????????????????????????? |
| | | TIM_TimeBaseStructure.TIM_Prescaler =72-1; //??????TIMx??????????? |
| | | TIM_TimeBaseStructure.TIM_ClockDivision = TIM_CKD_DIV1; //??????:TDTS = Tck_tim |
| | | TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; //TIM?????? |
| | | TIM_TimeBaseInit(TIM3, &TIM_TimeBaseStructure); //??????????TIMx??????? |
| | | |
| | | TIM_ITConfig(TIM3,TIM_IT_Update,ENABLE ); //?????TIM3??,?????? |
| | | |
| | | //?????NVIC?? |
| | | NVIC_InitStructure.NVIC_IRQChannel = TIM3_IRQn; //TIM3?? |
| | | NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; //?????0? |
| | | NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; //????3? |
| | | NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; //IRQ????? |
| | | NVIC_Init(&NVIC_InitStructure); //???NVIC??? |
| | | |
| | | |
| | | TIM_Cmd(TIM3, ENABLE); //??TIMx |
| | | } |
| | | //???3?????? |
| | | int Systick_Init(void) |
| | | { |
| | | int time_retry = 500; |
| | | if (SysTick_Config(72000)) |
| | | { |
| | | int time_retry = 500; |
| | | if (SysTick_Config(72000)) |
| | | { |
| | | /* Capture error */ |
| | | while (time_retry--); |
| | | return 1; |
| | | return 1; |
| | | } |
| | | NVIC_SetPriority(SysTick_IRQn, 5); |
| | | |
| | | return 0; |
| | | |
| | | |
| | | } |
| | | |
| | | void delay_us(uint32_t nTimer) |
| | | { |
| | | uint32_t i=0; |
| | | for(i=0;i<nTimer;i++){ |
| | | __NOP();__NOP();__NOP();__NOP();__NOP();__NOP();__NOP();__NOP();__NOP();__NOP(); |
| | | __NOP();__NOP();__NOP();__NOP();__NOP();__NOP();__NOP();__NOP();__NOP();__NOP(); |
| | | __NOP();__NOP();__NOP();__NOP();__NOP();__NOP();__NOP();__NOP();__NOP();__NOP(); |
| | | __NOP();__NOP();__NOP();__NOP();__NOP();__NOP();__NOP();__NOP();__NOP();__NOP(); |
| | | __NOP();__NOP();__NOP();__NOP();__NOP();__NOP();__NOP();__NOP();__NOP();__NOP(); |
| | | __NOP();__NOP();__NOP();__NOP();__NOP();__NOP();__NOP();__NOP();__NOP();__NOP(); |
| | | __NOP();__NOP();__NOP();__NOP(); |
| | | } |
| | | void delay_us(uint32_t nTimer) |
| | | { |
| | | uint32_t i=0; |
| | | for(i=0; i<nTimer; i++) { |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | __NOP(); |
| | | } |
| | | } |
| | | |
| | | void delay_ms(uint32_t nTimer) |
| | | { |
| | | uint32_t i=1000*nTimer; |
| | | delay_us(i); |
| | | } |
| | | void delay_ms(uint32_t nTimer) |
| | | { |
| | | uint32_t i=1000*nTimer; |
| | | delay_us(i); |
| | | } |