From 2d43068c500d6420b0864eebfcfcdd0943c5738c Mon Sep 17 00:00:00 2001 From: chen <15335560115@163.com> Date: 星期三, 02 四月 2025 18:08:01 +0800 Subject: [PATCH] 修改PA驱动代码,成功驱动pa并且修复串口读取bug --- user_config.h | 32 ++++++++++++++++++++------------ 1 files changed, 20 insertions(+), 12 deletions(-) diff --git a/user_config.h b/user_config.h index ac62784..847d48c 100644 --- a/user_config.h +++ b/user_config.h @@ -57,7 +57,7 @@ /* =========================================================================================================================== */ /** Enable trace output */ -#define TRACE_EN (0) +#define TRACE_EN (1) /** Enable exception reboot */ #ifndef TRACE_REBOOT_EN @@ -68,7 +68,7 @@ #define TRACE_STD_LIB_EN (0) /** Configure trace level for modules: BOOT | TEST | UCI | UWB | APP | DRIVER | PHY | MAC */ -#define TRACE_LVL_CONFIG_0 (0x44444004) +#define TRACE_LVL_CONFIG_0 (0x44444004) //yuan #define TRACE_LVL_CONFIG_0 (0x44444444) /** Configure trace level for modules: CCC | FIRA | OS */ #define TRACE_LVL_CONFIG_1 (0x00000444) @@ -141,7 +141,7 @@ /** Antenna port number for AoA, 2~4 */ #define RX_AOA_ANT_PORTS_NUM (4) -/** Antenna ports combination for AoA, @ref enum RX_ANTENNA_MODE_T */ +/** Antenna ports c ombination for AoA, @ref enum RX_ANTENNA_MODE_T */ #define RX_AOA_ANT_PORTS_COMBINATION (RX_4PORTS_ANT_3_0_1_2) /** Antenna pattern: Linear or Square */ @@ -153,6 +153,9 @@ /** Maximum PHY payload length */ #define PHY_PAYLOAD_LEN_MAX (127) +//#define BOXING +//#define BOXING +#define LED_PIN IO_PIN_4 /* =========================================================================================================================== */ /* ================ Simple Selection ================ */ /* =========================================================================================================================== */ @@ -168,19 +171,24 @@ //#define MK_DS_TWR_RESP_STS -//#define MK_SS_TWR_DW_INIT +#define MK_SS_TWR_DW_INIT -#define MK_SS_TWR_DW_RESP +//#define MK_SS_TWR_DW_RESP #define INPUT_5V_Pin IO_PIN_11 -#define RSSI_EN (1) -#define ACCLERATE_DETECT_Pin IO_PIN_2 -#define SDA_PIN IO_PIN_3 -#define SER_PIN IO_PIN_3 -#define SCL_PIN IO_PIN_4 -#define SRCLK_PIN IO_PIN_8 -#define RCLK_PIN IO_PIN_7 +#define RSSI_EN (0) +/** channel number: 2, 5, 9 */ +#define UWB_CH_NUM (5) +/** Velocity of propagation (%) */ +#define VP_VAL (100) +#define RANGING_CORR (0) +#define XTAL_AUTO_TUNE_EN (0) +//#define STS_MODE +//#define MK_MODE +#define SLEEP_COUNT 1000 +#define DW1000 + /* =========================================================================================================================== */ /* ================ End ================ */ /* =========================================================================================================================== */ -- Gitblit v1.9.3