From 387d1ffc16ce9e050403baee0ed07f3d9accf632 Mon Sep 17 00:00:00 2001
From: chen <15335560115@163.com>
Date: 星期五, 04 七月 2025 14:55:15 +0800
Subject: [PATCH] 初步移植完成0.6.8SDK，但发送有len太长未找到原因
---
keil/include/drivers/lis3dh_driver.h | 596 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
1 files changed, 596 insertions(+), 0 deletions(-)
diff --git a/keil/include/drivers/lis3dh_driver.h b/keil/include/drivers/lis3dh_driver.h
new file mode 100644
index 0000000..6ae5e21
--- /dev/null
+++ b/keil/include/drivers/lis3dh_driver.h
@@ -0,0 +1,596 @@
+/******************** (C) COPYRIGHT 2012 STMicroelectronics ********************
+* File Name : lis3dh_driver.h
+* Author : MSH Application Team
+* Author : Abhishek Anand, Fabio Tota
+* Version : $Revision:$
+* Date : $Date:$
+* Description : Descriptor Header for lis3dh_driver.c driver file
+*
+* HISTORY:
+* Date | Modification | Author
+* 24/06/2011 | Initial Revision | Fabio Tota
+* 07/06/2012 | Support for multiple drivers in the same program | Abhishek Anand
+*
+********************************************************************************
+* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
+* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
+* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
+* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*
+* THIS SOFTWARE IS SPECIFICALLY DESIGNED FOR EXCLUSIVE USE WITH ST PARTS.
+*
+*******************************************************************************/
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __LIS3DH_DRIVER__H
+#define __LIS3DH_DRIVER__H
+
+/* Includes ------------------------------------------------------------------*/
+/* Exported types ------------------------------------------------------------*/
+#include "math.h"
+#include "stdint.h"
+#include "stdint.h"
+#include "user_config.h"
+//#define BITBAND(addr, bitnum) ((addr & 0xF0000000)+0x2000000+((addr &0xFFFFF)<<5)+(bitnum<<2))
+//#define MEM_ADDR(addr) *((volatile unsigned long *)(addr))
+//#define BIT_ADDR(addr, bitnum) MEM_ADDR(BITBAND(addr, bitnum))
+//#define GPIOA_ODR_Addr (GPIOA_BASE+0x14) //0x4001080C
+//#define GPIOA_IDR_Addr (GPIOA_BASE+0x10) //0x40010808
+
+//#define PAout(n) BIT_ADDR(GPIOA_ODR_Addr,n) //输出
+//#define PAin(n) BIT_ADDR(GPIOA_IDR_Addr,n) //输入
+
+////IO操作函数
+//#define IIC2_SCL PAout(2) //SCL
+//#define IIC2_SDA PAout(3) //SDA
+//#define IIC2_READ_SDA PAin(3) //输入SDA
+#define IIC2_READ_SDA gpio_pin_get_val(SDA_PIN)
+#define SDA_1 gpio_pin_set(SDA_PIN)
+#define SCL_1 gpio_pin_set(SCL_PIN)
+
+#define SDA_0 gpio_pin_clr(SDA_PIN)
+#define SCL_0 gpio_pin_clr(SCL_PIN)
+//IIC所有操作函数
+void IIC2_Init(void); //初始化IIC的IO口
+uint8_t LIS3DH_WriteReg(uint8_t WriteAddr, uint8_t Data);
+void IIC2_Start(void); //发送IIC开始信号
+void IIC2_Stop(void); //发送IIC停止信号
+void IIC2_Send_Byte(uint8_t txd); //IIC发送一个字节
+uint8_t IIC2_Read_Byte(unsigned char ack);//IIC读取一个字节
+uint8_t IIC2_Wait_Ack(void); //IIC等待ACK信号
+void IIC2_Ack(void); //IIC发送ACK信号
+void IIC2_NAck(void); //IIC不发送ACK信号
+float drv_lis2dh12_get_angle(void);
+//these could change accordingly with the architecture
+void LIS3DH_Data_Init(void);
+void LIS3DH_ENTER_STY_Init();
+
+void Accelerometer_Init();
+
+void mir3da_init(void);
+void do_difff_calibrate();
+
+void mir3da_set_enable(int enable);
+void mir3da_read_raw_data(short *x, short *y, short *z);
+void mir3da_read_data(short *x, short *y, short *z);
+void mir3da_set_active_interrupt_enable(int enable);
+void mir3da_set_step_counter_open(int enable);
+
+uint8_t mir3da_ReadOneByte(uint16_t ReadAddr);
+void mir3da_WriteLenByte(uint16_t WriteAddr,uint32_t DataToWrite,uint8_t Len);
+void mir3da_WriteOneByte(uint16_t WriteAddr,uint8_t DataToWrite);
+
+
+uint32_t mir3da_ReadLenByte(uint16_t ReadAddr,int Len);
+
+
+
+
+
+
+
+
+
+
+
+ //初始化,并操作
+#ifndef __ARCHDEP__TYPES
+#define __ARCHDEP__TYPES
+
+//为兼容HAL_Cube库，使用统一命名
+//typedef unsigned char uint8_t;
+//typedef unsigned short int uint16_t;
+//typedef short int int16_t;
+//typedef signed char int8_t;
+
+
+
+
+#endif /*__ARCHDEP__TYPES*/
+
+typedef uint8_t LIS3DH_IntPinConf_t;
+typedef uint8_t LIS3DH_Axis_t;
+typedef uint8_t LIS3DH_Int1Conf_t;
+
+
+//define structure
+#ifndef __SHARED__TYPES
+#define __SHARED__TYPES
+
+typedef enum {
+ MEMS_SUCCESS = 0x01,
+ MEMS_ERROR = 0x00
+} status_t;
+
+typedef enum {
+ MEMS_ENABLE = 0x01,
+ MEMS_DISABLE = 0x00
+} State_t;
+
+typedef struct {
+ int16_t AXIS_X;
+ int16_t AXIS_Y;
+ int16_t AXIS_Z;
+} AxesRaw_t;
+
+#endif /*__SHARED__TYPES*/
+
+typedef enum {
+ LIS3DH_ODR_1Hz = 0x01,
+ LIS3DH_ODR_10Hz = 0x02,
+ LIS3DH_ODR_25Hz = 0x03,
+ LIS3DH_ODR_50Hz = 0x04,
+ LIS3DH_ODR_100Hz = 0x05,
+ LIS3DH_ODR_200Hz = 0x06,
+ LIS3DH_ODR_400Hz = 0x07,
+ LIS3DH_ODR_1620Hz_LP = 0x08,
+ LIS3DH_ODR_1344Hz_NP_5367HZ_LP = 0x09
+} LIS3DH_ODR_t;
+
+typedef enum {
+ LIS3DH_POWER_DOWN = 0x00,
+ LIS3DH_LOW_POWER = 0x01,
+ LIS3DH_NORMAL = 0x02
+} LIS3DH_Mode_t;
+
+typedef enum {
+ LIS3DH_HPM_NORMAL_MODE_RES = 0x00,
+ LIS3DH_HPM_REF_SIGNAL = 0x01,
+ LIS3DH_HPM_NORMAL_MODE = 0x02,
+ LIS3DH_HPM_AUTORESET_INT = 0x03
+} LIS3DH_HPFMode_t;
+
+typedef enum {
+ LIS3DH_HPFCF_0 = 0x00,
+ LIS3DH_HPFCF_1 = 0x01,
+ LIS3DH_HPFCF_2 = 0x02,
+ LIS3DH_HPFCF_3 = 0x03
+} LIS3DH_HPFCutOffFreq_t;
+
+typedef struct {
+ uint16_t AUX_1;
+ uint16_t AUX_2;
+ uint16_t AUX_3;
+} LIS3DH_Aux123Raw_t;
+
+typedef enum {
+ LIS3DH_FULLSCALE_2 = 0x00,
+ LIS3DH_FULLSCALE_4 = 0x01,
+ LIS3DH_FULLSCALE_8 = 0x02,
+ LIS3DH_FULLSCALE_16 = 0x03
+} LIS3DH_Fullscale_t;
+
+typedef enum {
+ LIS3DH_BLE_LSB = 0x00,
+ LIS3DH_BLE_MSB = 0x01
+} LIS3DH_Endianess_t;
+
+typedef enum {
+ LIS3DH_SELF_TEST_DISABLE = 0x00,
+ LIS3DH_SELF_TEST_0 = 0x01,
+ LIS3DH_SELF_TEST_1 = 0x02
+} LIS3DH_SelfTest_t;
+
+typedef enum {
+ LIS3DH_FIFO_BYPASS_MODE = 0x00,
+ LIS3DH_FIFO_MODE = 0x01,
+ LIS3DH_FIFO_STREAM_MODE = 0x02,
+ LIS3DH_FIFO_TRIGGER_MODE = 0x03,
+ LIS3DH_FIFO_DISABLE = 0x04
+} LIS3DH_FifoMode_t;
+
+typedef enum {
+ LIS3DH_TRIG_INT1 = 0x00,
+ LIS3DH_TRIG_INT2 = 0x01
+} LIS3DH_TrigInt_t;
+
+typedef enum {
+ LIS3DH_SPI_4_WIRE = 0x00,
+ LIS3DH_SPI_3_WIRE = 0x01
+} LIS3DH_SPIMode_t;
+
+typedef enum {
+ LIS3DH_X_ENABLE = 0x01,
+ LIS3DH_X_DISABLE = 0x00,
+ LIS3DH_Y_ENABLE = 0x02,
+ LIS3DH_Y_DISABLE = 0x00,
+ LIS3DH_Z_ENABLE = 0x04,
+ LIS3DH_Z_DISABLE = 0x00
+} LIS3DH_AXISenable_t;
+
+typedef enum {
+ LIS3DH_INT1_6D_4D_DISABLE = 0x00,
+ LIS3DH_INT1_6D_ENABLE = 0x01,
+ LIS3DH_INT1_4D_ENABLE = 0x02
+} LIS3DH_INT_6D_4D_t;
+
+typedef enum {
+ LIS3DH_UP_SX = 0x44,
+ LIS3DH_UP_DX = 0x42,
+ LIS3DH_DW_SX = 0x41,
+ LIS3DH_DW_DX = 0x48,
+ LIS3DH_TOP = 0x60,
+ LIS3DH_BOTTOM = 0x50
+} LIS3DH_POSITION_6D_t;
+
+typedef enum {
+ LIS3DH_INT_MODE_OR = 0x00,
+ LIS3DH_INT_MODE_6D_MOVEMENT = 0x01,
+ LIS3DH_INT_MODE_AND = 0x02,
+ LIS3DH_INT_MODE_6D_POSITION = 0x03
+} LIS3DH_Int1Mode_t;
+
+
+//interrupt click response
+// b7 = don't care b6 = IA b5 = DClick b4 = Sclick b3 = Sign
+// b2 = z b1 = y b0 = x
+typedef enum {
+LIS3DH_DCLICK_Z_P = 0x24,
+LIS3DH_DCLICK_Z_N = 0x2C,
+LIS3DH_SCLICK_Z_P = 0x14,
+LIS3DH_SCLICK_Z_N = 0x1C,
+LIS3DH_DCLICK_Y_P = 0x22,
+LIS3DH_DCLICK_Y_N = 0x2A,
+LIS3DH_SCLICK_Y_P = 0x12,
+LIS3DH_SCLICK_Y_N = 0x1A,
+LIS3DH_DCLICK_X_P = 0x21,
+LIS3DH_DCLICK_X_N = 0x29,
+LIS3DH_SCLICK_X_P = 0x11,
+LIS3DH_SCLICK_X_N = 0x19,
+LIS3DH_NO_CLICK = 0x00
+} LIS3DH_Click_Response;
+
+//TODO: start from here and manage the shared macros etc before this
+
+/* Exported constants --------------------------------------------------------*/
+
+#ifndef __SHARED__CONSTANTS
+#define __SHARED__CONSTANTS
+
+#define MEMS_SET 0x01
+#define MEMS_RESET 0x00
+
+#endif /*__SHARED__CONSTANTS*/
+
+
+//Register Definition
+#define LIS3DH_WHO_AM_I 0x0F // device identification register
+
+// CONTROL REGISTER 1
+#define LIS3DH_CTRL_REG1 0x20
+#define LIS3DH_ODR_BIT BIT(4)
+#define LIS3DH_LPEN BIT(3)
+#define LIS3DH_ZEN BIT(2)
+#define LIS3DH_YEN BIT(1)
+#define LIS3DH_XEN BIT(0)
+
+//CONTROL REGISTER 2
+#define LIS3DH_CTRL_REG2 0x21
+#define LIS3DH_HPM BIT(6)
+#define LIS3DH_HPCF BIT(4)
+#define LIS3DH_FDS BIT(3)
+#define LIS3DH_HPCLICK BIT(2)
+#define LIS3DH_HPIS2 BIT(1)
+#define LIS3DH_HPIS1 BIT(0)
+
+//CONTROL REGISTER 3
+#define LIS3DH_CTRL_REG3 0x22
+#define LIS3DH_I1_CLICK BIT(7)
+#define LIS3DH_I1_AOI1 BIT(6)
+#define LIS3DH_I1_AOI2 BIT(5)
+#define LIS3DH_I1_DRDY1 BIT(4)
+#define LIS3DH_I1_DRDY2 BIT(3)
+#define LIS3DH_I1_WTM BIT(2)
+#define LIS3DH_I1_ORUN BIT(1)
+
+//CONTROL REGISTER 6
+#define LIS3DH_CTRL_REG6 0x25
+#define LIS3DH_I2_CLICK BIT(7)
+#define LIS3DH_I2_INT1 BIT(6)
+#define LIS3DH_I2_BOOT BIT(4)
+#define LIS3DH_H_LACTIVE BIT(1)
+
+//TEMPERATURE CONFIG REGISTER
+#define LIS3DH_TEMP_CFG_REG 0x1F
+#define LIS3DH_ADC_PD BIT(7)
+#define LIS3DH_TEMP_EN BIT(6)
+
+//CONTROL REGISTER 4
+#define LIS3DH_CTRL_REG4 0x23
+#define LIS3DH_BDU BIT(7)
+#define LIS3DH_BLE BIT(6)
+#define LIS3DH_FS BIT(4)
+#define LIS3DH_HR BIT(3)
+#define LIS3DH_ST BIT(1)
+#define LIS3DH_SIM BIT(0)
+
+//CONTROL REGISTER 5
+#define LIS3DH_CTRL_REG5 0x24
+#define LIS3DH_BOOT BIT(7)
+#define LIS3DH_FIFO_EN BIT(6)
+#define LIS3DH_LIR_INT1 BIT(3)
+#define LIS3DH_D4D_INT1 BIT(2)
+
+//REFERENCE/DATA_CAPTURE
+#define LIS3DH_REFERENCE_REG 0x26
+#define LIS3DH_REF BIT(0)
+
+//STATUS_REG_AXIES
+#define LIS3DH_STATUS_REG 0x27
+#define LIS3DH_ZYXOR BIT(7)
+#define LIS3DH_ZOR BIT(6)
+#define LIS3DH_YOR BIT(5)
+#define LIS3DH_XOR BIT(4)
+#define LIS3DH_ZYXDA BIT(3)
+#define LIS3DH_ZDA BIT(2)
+#define LIS3DH_YDA BIT(1)
+#define LIS3DH_XDA BIT(0)
+
+//STATUS_REG_AUX
+#define LIS3DH_STATUS_AUX 0x07
+
+//INTERRUPT 1 CONFIGURATION
+#define LIS3DH_INT1_CFG 0x30
+#define LIS3DH_ANDOR BIT(7)
+#define LIS3DH_INT_6D BIT(6)
+#define LIS3DH_ZHIE BIT(5)
+#define LIS3DH_ZLIE BIT(4)
+#define LIS3DH_YHIE BIT(3)
+#define LIS3DH_YLIE BIT(2)
+#define LIS3DH_XHIE BIT(1)
+#define LIS3DH_XLIE BIT(0)
+
+//FIFO CONTROL REGISTER
+#define LIS3DH_FIFO_CTRL_REG 0x2E
+#define LIS3DH_FM BIT(6)
+#define LIS3DH_TR BIT(5)
+#define LIS3DH_FTH BIT(0)
+
+//CONTROL REG3 bit mask
+#define LIS3DH_CLICK_ON_PIN_INT1_ENABLE 0x80
+#define LIS3DH_CLICK_ON_PIN_INT1_DISABLE 0x00
+#define LIS3DH_I1_INT1_ON_PIN_INT1_ENABLE 0x40
+#define LIS3DH_I1_INT1_ON_PIN_INT1_DISABLE 0x00
+#define LIS3DH_I1_INT2_ON_PIN_INT1_ENABLE 0x20
+#define LIS3DH_I1_INT2_ON_PIN_INT1_DISABLE 0x00
+#define LIS3DH_I1_DRDY1_ON_INT1_ENABLE 0x10
+#define LIS3DH_I1_DRDY1_ON_INT1_DISABLE 0x00
+#define LIS3DH_I1_DRDY2_ON_INT1_ENABLE 0x08
+#define LIS3DH_I1_DRDY2_ON_INT1_DISABLE 0x00
+#define LIS3DH_WTM_ON_INT1_ENABLE 0x04
+#define LIS3DH_WTM_ON_INT1_DISABLE 0x00
+#define LIS3DH_INT1_OVERRUN_ENABLE 0x02
+#define LIS3DH_INT1_OVERRUN_DISABLE 0x00
+
+//CONTROL REG6 bit mask
+#define LIS3DH_CLICK_ON_PIN_INT2_ENABLE 0x80
+#define LIS3DH_CLICK_ON_PIN_INT2_DISABLE 0x00
+#define LIS3DH_I2_INT1_ON_PIN_INT2_ENABLE 0x40
+#define LIS3DH_I2_INT1_ON_PIN_INT2_DISABLE 0x00
+#define LIS3DH_I2_INT2_ON_PIN_INT2_ENABLE 0x20
+#define LIS3DH_I2_INT2_ON_PIN_INT2_DISABLE 0x00
+#define LIS3DH_I2_BOOT_ON_INT2_ENABLE 0x10
+#define LIS3DH_I2_BOOT_ON_INT2_DISABLE 0x00
+#define LIS3DH_INT_ACTIVE_HIGH 0x00
+#define LIS3DH_INT_ACTIVE_LOW 0x02
+
+//INT1_CFG bit mask
+#define LIS3DH_INT1_AND 0x80
+#define LIS3DH_INT1_OR 0x00
+#define LIS3DH_INT1_ZHIE_ENABLE 0x20
+#define LIS3DH_INT1_ZHIE_DISABLE 0x00
+#define LIS3DH_INT1_ZLIE_ENABLE 0x10
+#define LIS3DH_INT1_ZLIE_DISABLE 0x00
+#define LIS3DH_INT1_YHIE_ENABLE 0x08
+#define LIS3DH_INT1_YHIE_DISABLE 0x00
+#define LIS3DH_INT1_YLIE_ENABLE 0x04
+#define LIS3DH_INT1_YLIE_DISABLE 0x00
+#define LIS3DH_INT1_XHIE_ENABLE 0x02
+#define LIS3DH_INT1_XHIE_DISABLE 0x00
+#define LIS3DH_INT1_XLIE_ENABLE 0x01
+#define LIS3DH_INT1_XLIE_DISABLE 0x00
+
+//INT1_SRC bit mask
+#define LIS3DH_INT1_SRC_IA 0x40
+#define LIS3DH_INT1_SRC_ZH 0x20
+#define LIS3DH_INT1_SRC_ZL 0x10
+#define LIS3DH_INT1_SRC_YH 0x08
+#define LIS3DH_INT1_SRC_YL 0x04
+#define LIS3DH_INT1_SRC_XH 0x02
+#define LIS3DH_INT1_SRC_XL 0x01
+
+//INT1 REGISTERS
+#define LIS3DH_INT1_THS 0x32
+#define LIS3DH_INT1_DURATION 0x33
+
+//INTERRUPT 1 SOURCE REGISTER
+#define LIS3DH_INT1_SRC 0x31
+
+//FIFO Source Register bit Mask
+#define LIS3DH_FIFO_SRC_WTM 0x80
+#define LIS3DH_FIFO_SRC_OVRUN 0x40
+#define LIS3DH_FIFO_SRC_EMPTY 0x20
+
+//INTERRUPT CLICK REGISTER
+#define LIS3DH_CLICK_CFG 0x38
+//INTERRUPT CLICK CONFIGURATION bit mask
+#define LIS3DH_ZD_ENABLE 0x20
+#define LIS3DH_ZD_DISABLE 0x00
+#define LIS3DH_ZS_ENABLE 0x10
+#define LIS3DH_ZS_DISABLE 0x00
+#define LIS3DH_YD_ENABLE 0x08
+#define LIS3DH_YD_DISABLE 0x00
+#define LIS3DH_YS_ENABLE 0x04
+#define LIS3DH_YS_DISABLE 0x00
+#define LIS3DH_XD_ENABLE 0x02
+#define LIS3DH_XD_DISABLE 0x00
+#define LIS3DH_XS_ENABLE 0x01
+#define LIS3DH_XS_DISABLE 0x00
+
+//INTERRUPT CLICK SOURCE REGISTER
+#define LIS3DH_CLICK_SRC 0x39
+//INTERRUPT CLICK SOURCE REGISTER bit mask
+#define LIS3DH_IA 0x40
+#define LIS3DH_DCLICK 0x20
+#define LIS3DH_SCLICK 0x10
+#define LIS3DH_CLICK_SIGN 0x08
+#define LIS3DH_CLICK_Z 0x04
+#define LIS3DH_CLICK_Y 0x02
+#define LIS3DH_CLICK_X 0x01
+
+//Click-click Register
+#define LIS3DH_CLICK_THS 0x3A
+#define LIS3DH_TIME_LIMIT 0x3B
+#define LIS3DH_TIME_LATENCY 0x3C
+#define LIS3DH_TIME_WINDOW 0x3D
+
+//OUTPUT REGISTER
+#define LIS3DH_OUT_X_L 0x28
+#define LIS3DH_OUT_X_H 0x29
+#define LIS3DH_OUT_Y_L 0x2A
+#define LIS3DH_OUT_Y_H 0x2B
+#define LIS3DH_OUT_Z_L 0x2C
+#define LIS3DH_OUT_Z_H 0x2D
+
+//AUX REGISTER
+#define LIS3DH_OUT_1_L 0x08
+#define LIS3DH_OUT_1_H 0x09
+#define LIS3DH_OUT_2_L 0x0A
+#define LIS3DH_OUT_2_H 0x0B
+#define LIS3DH_OUT_3_L 0x0C
+#define LIS3DH_OUT_3_H 0x0D
+
+//STATUS REGISTER bit mask
+#define LIS3DH_STATUS_REG_ZYXOR 0x80 // 1 : new data set has over written the previous one
+ // 0 : no overrun has occurred (default)
+#define LIS3DH_STATUS_REG_ZOR 0x40 // 0 : no overrun has occurred (default)
+ // 1 : new Z-axis data has over written the previous one
+#define LIS3DH_STATUS_REG_YOR 0x20 // 0 : no overrun has occurred (default)
+ // 1 : new Y-axis data has over written the previous one
+#define LIS3DH_STATUS_REG_XOR 0x10 // 0 : no overrun has occurred (default)
+ // 1 : new X-axis data has over written the previous one
+#define LIS3DH_STATUS_REG_ZYXDA 0x08 // 0 : a new set of data is not yet avvious one
+ // 1 : a new set of data is available
+#define LIS3DH_STATUS_REG_ZDA 0x04 // 0 : a new data for the Z-Axis is not availvious one
+ // 1 : a new data for the Z-Axis is available
+#define LIS3DH_STATUS_REG_YDA 0x02 // 0 : a new data for the Y-Axis is not available
+ // 1 : a new data for the Y-Axis is available
+#define LIS3DH_STATUS_REG_XDA 0x01 // 0 : a new data for the X-Axis is not available
+
+#define LIS3DH_DATAREADY_BIT LIS3DH_STATUS_REG_ZYXDA
+
+
+//STATUS AUX REGISTER bit mask
+#define LIS3DH_STATUS_AUX_321OR 0x80
+#define LIS3DH_STATUS_AUX_3OR 0x40
+#define LIS3DH_STATUS_AUX_2OR 0x20
+#define LIS3DH_STATUS_AUX_1OR 0x10
+#define LIS3DH_STATUS_AUX_321DA 0x08
+#define LIS3DH_STATUS_AUX_3DA 0x04
+#define LIS3DH_STATUS_AUX_2DA 0x02
+#define LIS3DH_STATUS_AUX_1DA 0x01
+
+#define LIS3DH_MEMS_I2C_ADDRESS 0x33
+
+//FIFO REGISTERS
+#define LIS3DH_FIFO_CTRL_REG 0x2E
+#define LIS3DH_FIFO_SRC_REG 0x2F
+
+
+/* Exported macro ------------------------------------------------------------*/
+
+#ifndef __SHARED__MACROS
+
+#define __SHARED__MACROS
+#define ValBit(VAR,Place) (VAR & (1<<Place))
+#define BIT(x) ( (x) )
+
+#endif /*__SHARED__MACROS*/
+
+/* Exported functions --------------------------------------------------------*/
+//Sensor Configuration Functions
+status_t LIS3DH_SetODR(LIS3DH_ODR_t ov);
+status_t LIS3DH_SetMode(LIS3DH_Mode_t md);
+status_t LIS3DH_SetAxis(LIS3DH_Axis_t axis);
+status_t LIS3DH_SetFullScale(LIS3DH_Fullscale_t fs);
+status_t LIS3DH_SetBDU(State_t bdu);
+status_t LIS3DH_SetBLE(LIS3DH_Endianess_t ble);
+status_t LIS3DH_SetSelfTest(LIS3DH_SelfTest_t st);
+status_t LIS3DH_SetTemperature(State_t state);
+status_t LIS3DH_SetADCAux(State_t state);
+
+//Filtering Functions
+status_t LIS3DH_HPFClickEnable(State_t hpfe);
+status_t LIS3DH_HPFAOI1Enable(State_t hpfe);
+status_t LIS3DH_HPFAOI2Enable(State_t hpfe);
+status_t LIS3DH_SetHPFMode(LIS3DH_HPFMode_t hpf);
+status_t LIS3DH_SetHPFCutOFF(LIS3DH_HPFCutOffFreq_t hpf);
+status_t LIS3DH_SetFilterDataSel(State_t state);
+
+//Interrupt Functions
+status_t LIS3DH_SetInt1Pin(LIS3DH_IntPinConf_t pinConf);
+status_t LIS3DH_SetInt2Pin(LIS3DH_IntPinConf_t pinConf);
+status_t LIS3DH_Int1LatchEnable(State_t latch);
+status_t LIS3DH_ResetInt1Latch(void);
+status_t LIS3DH_SetIntConfiguration(LIS3DH_Int1Conf_t ic);
+status_t LIS3DH_SetInt1Threshold(uint8_t ths);
+status_t LIS3DH_SetInt1Duration(LIS3DH_Int1Conf_t id);
+status_t LIS3DH_SetIntMode(LIS3DH_Int1Mode_t ic);
+status_t LIS3DH_SetClickCFG(uint8_t status);
+status_t LIS3DH_SetInt6D4DConfiguration(LIS3DH_INT_6D_4D_t ic);
+status_t LIS3DH_GetInt1Src(uint8_t* val);
+status_t LIS3DH_GetInt1SrcBit(uint8_t statusBIT, uint8_t* val);
+
+//FIFO Functions
+status_t LIS3DH_FIFOModeEnable(LIS3DH_FifoMode_t fm);
+status_t LIS3DH_SetWaterMark(uint8_t wtm);
+status_t LIS3DH_SetTriggerInt(LIS3DH_TrigInt_t tr);
+status_t LIS3DH_GetFifoSourceReg(uint8_t* val);
+status_t LIS3DH_GetFifoSourceBit(uint8_t statusBIT, uint8_t* val);
+status_t LIS3DH_GetFifoSourceFSS(uint8_t* val);
+
+//Other Reading Functions
+status_t LIS3DH_GetStatusReg(uint8_t* val);
+status_t LIS3DH_GetStatusBit(uint8_t statusBIT, uint8_t* val);
+status_t LIS3DH_GetStatusAUXBit(uint8_t statusBIT, uint8_t* val);
+status_t LIS3DH_GetStatusAUX(uint8_t* val);
+status_t LIS3DH_GetAccAxesRaw(AxesRaw_t* buff);
+status_t LIS3DH_GetAuxRaw(LIS3DH_Aux123Raw_t* buff);
+status_t LIS3DH_GetClickResponse(uint8_t* val);
+status_t LIS3DH_GetTempRaw(int8_t* val);
+status_t LIS3DH_GetWHO_AM_I(uint8_t* val);
+status_t LIS3DH_Get6DPosition(uint8_t* val);
+
+//Generic
+// i.e. uint8_t LIS3DH_ReadReg(uint8_t Reg, uint8_t* Data);
+// i.e. uint8_t LIS3DH_WriteReg(uint8_t Reg, uint8_t Data);
+
+
+#endif /* __LIS3DH_H */
+
+/******************* (C) COPYRIGHT 2012 STMicroelectronics *****END OF FILE****/
+
+
+
--
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