From 5102fff8a13c0319d8125a51d3d2354e7aacdcea Mon Sep 17 00:00:00 2001
From: chen <15335560115@163.com>
Date: 星期四, 31 七月 2025 16:40:06 +0800
Subject: [PATCH] 修改为2HZ发poll包，修改second task从原来2s一次为1s一次
---
keil/include/drivers/mk_gpio.c | 45 +++++++++++++++++++++++++--------------------
1 files changed, 25 insertions(+), 20 deletions(-)
diff --git a/keil/include/drivers/mk_gpio.c b/keil/include/drivers/mk_gpio.c
index b2d886e..9541461 100644
--- a/keil/include/drivers/mk_gpio.c
+++ b/keil/include/drivers/mk_gpio.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2019-2023 Beijing Hanwei Innovation Technology Ltd. Co. and
+ * Copyright (c) 2019-2025 Beijing Hanwei Innovation Technology Ltd. Co. and
* its subsidiaries and affiliates (collectly called MKSEMI).
*
* All rights reserved.
@@ -135,22 +135,22 @@
{
switch (irq_type)
{
- case GPIO_IRQ_TYPE_LOW_LEVEL:
- gpio_handle[0].base->INTPOLCLR = (1U << pin);
- gpio_handle[0].base->INTTYPECLR = (1U << pin);
- break;
- case GPIO_IRQ_TYPE_HIGH_LEVEL:
- gpio_handle[0].base->INTPOLSET = (1U << pin);
- gpio_handle[0].base->INTTYPECLR = (1U << pin);
- break;
- case GPIO_IRQ_TYPE_FALLING_EDGE:
- gpio_handle[0].base->INTPOLCLR = (1U << pin);
- gpio_handle[0].base->INTTYPESET = (1U << pin);
- break;
- case GPIO_IRQ_TYPE_RISING_EDGE:
- gpio_handle[0].base->INTPOLSET = (1U << pin);
- gpio_handle[0].base->INTTYPESET = (1U << pin);
- break;
+ case GPIO_IRQ_TYPE_LOW_LEVEL:
+ gpio_handle[0].base->INTPOLCLR = (1U << pin);
+ gpio_handle[0].base->INTTYPECLR = (1U << pin);
+ break;
+ case GPIO_IRQ_TYPE_HIGH_LEVEL:
+ gpio_handle[0].base->INTPOLSET = (1U << pin);
+ gpio_handle[0].base->INTTYPECLR = (1U << pin);
+ break;
+ case GPIO_IRQ_TYPE_FALLING_EDGE:
+ gpio_handle[0].base->INTPOLCLR = (1U << pin);
+ gpio_handle[0].base->INTTYPESET = (1U << pin);
+ break;
+ case GPIO_IRQ_TYPE_RISING_EDGE:
+ gpio_handle[0].base->INTPOLSET = (1U << pin);
+ gpio_handle[0].base->INTTYPESET = (1U << pin);
+ break;
}
gpio_handle[0].irq_handler[pin] = irq_handler;
@@ -169,7 +169,9 @@
void gpio_disable_irq(enum IO_PIN_T pin)
{
gpio_handle[0].base->INTENCLR = (1U << pin);
+ gpio_handle[0].irq_handler[pin] = NULL;
gpio_handle[0].irq_mask &= ~(1U << pin);
+
if (gpio_handle[0].irq_mask == 0)
{
NVIC_DisableIRQ(gpio_handle[0].irq);
@@ -180,13 +182,16 @@
void GPIO_IRQHandler(void)
{
uint32_t int_stat = gpio_handle[0].base->INTSTATUS;
+ gpio_handle[0].base->INTSTATUS = int_stat;
for (enum IO_PIN_T i = 0; i < IO_PIN_MAX; i++)
{
- if ((int_stat & (1U << i)) && (gpio_handle[0].irq_handler[i]))
+ if (int_stat & (1U << i))
{
- gpio_handle[0].irq_handler[i](i);
- gpio_handle[0].base->INTSTATUS = (1 << i);
+ if (gpio_handle[0].irq_handler[i])
+ {
+ gpio_handle[0].irq_handler[i](i);
+ }
}
}
}
--
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