From 67c0751eab06b13ec17e82ab1920fd9dc2c5c457 Mon Sep 17 00:00:00 2001 From: chen <15335560115@163.com> Date: 星期二, 13 五月 2025 16:57:05 +0800 Subject: [PATCH] 最初摘取iphone测距功能 --- user_config.h | 228 +++++++++++++++++++++++++++++++++++++++++++++----------- 1 files changed, 183 insertions(+), 45 deletions(-) diff --git a/user_config.h b/user_config.h index 847d48c..a47e1ef 100644 --- a/user_config.h +++ b/user_config.h @@ -40,6 +40,13 @@ #ifndef USER_CONFIG_H_ #define USER_CONFIG_H_ +/* =========================================================================================================================== */ +/* ================ Platform configuration ================ */ +/* =========================================================================================================================== */ + +/** Platform */ +// #define CELL_PHONE_EN +// #define RPI4_EN /* =========================================================================================================================== */ /* ================ Silicon configuration ================ */ @@ -51,6 +58,117 @@ /* =========================================================================================================================== */ /* ================ Board configuration ================ */ /* =========================================================================================================================== */ + +/** UCI hardware port config: 0 - UART, 1 - SPI */ +#define UCI_INTF_PORT (0) + +/** UCI UART handshake enable, handshake pins configured from board.h */ +#define UCI_INTF_UART_HS_EN (0) + +/** UCI SPI half-duplex or full-duplex mode selection: 0 - half-duplex, 1 - full-duplex */ +#define UCI_INTF_SPI_HD_FD (0) + +/** When the host platform is cell phone or Raspberry Pi, the SPI full-duplex handshake interface is enabled */ +#if defined(CELL_PHONE_EN) || defined(RPI4_EN) +/** By default, spi full-duplex is used to communicate with cell phone and Raspberry Pi */ +#undef UCI_INTF_PORT +#define UCI_INTF_PORT (1) + +#undef UCI_INTF_SPI_HD_FD +#define UCI_INTF_SPI_HD_FD (1) +#endif + +#if UCI_INTF_PORT == 1 + +#if UCI_INTF_SPI_HD_FD +/** UCI SPI full-duplex handshake interface, handshake pins configured from board.h */ +#define UCI_INTF_SPI_FD_HS (1) +#else +/** UCI SPI half-duplex handshake interface, handshake pins configured from board.h */ +#define UCI_INTF_SPI_HD_HS (1) +#endif + +/** UCI SPI bit rate */ +#define UCI_INTF_SPI_SPEED 1000000 + +#else + +#if UCI_INTF_UART_HS_EN +/** UCI UART interface with handshake */ +#define UCI_INTF_UART_HS (1) + +/** The time for UART delay to send */ +#define UCI_INTF_UART_HS_DELAYED_SEND_US (1000) +#else +/** UCI UART interface without handshake */ +#define UCI_INTF_UART (1) +#endif + +/** UART baudrate, @ref enum UART_BAUD_T */ +#define UCI_INTF_UART_BAUD BAUD_921600 + +#endif + +/** Enable SE check over SPI */ +#if defined(CELL_PHONE_EN) +#define UCI_CHECK_SE_EN (1) +#else +#define UCI_CHECK_SE_EN (0) +#endif + +/** UCI handshake timeout */ +#define UCI_HS_TIMEOUT_MS (50U) + +/** Enable antenna delay calibration, golden reference need to set this macro */ +#define ANT_DELAY_CAL_EN (1) + +/* =========================================================================================================================== */ +/* ================ Driver configuration ================ */ +/* =========================================================================================================================== */ +// ACMP work mode +#define ACMP_INT_MODE_EN (0) +// ADC work mode +#define ADC_INT_MODE_EN (0) +#define ADC_DMA_MODE_EN (0) +#define ADC_POLL_MODE_EN (1) +// AES work mode +#define AES_INT_MODE_EN (0) +#define AES_DMA_MODE_EN (1) +#define AES_POLL_MODE_EN (0) +// Flash work mode +#define FLASH_INT_MODE_EN (0) +#define FLASH_DMA_MODE_EN (0) +#if ANT_DELAY_CAL_EN +#define FLASH_WRITE_EN (1) +#else +#define FLASH_WRITE_EN (0) +#endif +// I2C work mode +#define I2C_INT_MODE_EN (0) +#define I2C_POLL_MODE_EN (1) +// LSP work mode +#define LSP_INT_MODE_EN (0) +// PWM work mode +#define PWM_INT_MODE_EN (0) +// RTC work mode +#define RTC_FREE_COUNTER_EN (0) +// SPI work mode +#define SPI_INT_MODE_EN (0) +#define SPI_DMA_MODE_EN (1) +#define SPI_POLL_MODE_EN (1) +// TRNG work mode +#define TRNG_INT_MODE_EN (0) +#define TRNG_POLL_MODE_EN (1) +// UART work mode +#define UART_INT_MODE_EN (0) +#define UART_DMA_MODE_EN (1) +#define UART_POLL_MODE_EN (0) +// Dual Timer work mode +#define TIMER0_INT_MODE_EN (1) +#define TIMER1_INT_MODE_EN (1) +// Timer work mode +#define TIMER2_INT_MODE_EN (0) +#define TIMER3_INT_MODE_EN (1) /* =========================================================================================================================== */ /* ================ Debug/TRACE configuration ================ */ @@ -68,17 +186,25 @@ #define TRACE_STD_LIB_EN (0) /** Configure trace level for modules: BOOT | TEST | UCI | UWB | APP | DRIVER | PHY | MAC */ -#define TRACE_LVL_CONFIG_0 (0x44444004) //yuan #define TRACE_LVL_CONFIG_0 (0x44444444) +#define TRACE_LVL_CONFIG_0 (0x44444444) /** Configure trace level for modules: CCC | FIRA | OS */ #define TRACE_LVL_CONFIG_1 (0x00000444) +/** Configure trace buffer size (in bytes) */ +#define TRACE_BUF_SIZE (1024) + /* =========================================================================================================================== */ /* ================ Power configuration ================ */ /* =========================================================================================================================== */ + /** Enable low power mode */ #ifndef LOW_POWER_EN +#if (UCI_INTF_PORT || (UCI_INTF_PORT == 0 && UCI_INTF_UART_HS_EN) || ANT_DELAY_CAL_EN) #define LOW_POWER_EN (1) +#else +#define LOW_POWER_EN (0) +#endif #endif /** Enable 32.768K crystal as low power mode clock source */ @@ -103,7 +229,7 @@ /** Enable UWB high performance mode, it will increase power consumption */ #ifndef HIGH_PERFORMANCE_MODE_EN -#define HIGH_PERFORMANCE_MODE_EN (0) +#define HIGH_PERFORMANCE_MODE_EN (1) #endif /* =========================================================================================================================== */ @@ -111,7 +237,11 @@ /* =========================================================================================================================== */ /** Configure system clock source @ref enum CLOCK_ATTACH_TYPE_T */ +#if defined(CELL_PHONE_EN) +#define SYS_CLK_SOURCE (CLOCK_62P4M_EXT38P4M_SINE_TO_SYS_CLK) +#else #define SYS_CLK_SOURCE (CLOCK_62P4M_XTAL38P4M_TO_SYS_CLK) +#endif /** AHBCLK = SYSCLK/(div) @ref enum CLOCK_BUS_DIVIDER_VAL_T */ #define AHB_DIV (CLOCK_DIVIDED_BY_1) @@ -120,12 +250,16 @@ #define APB_DIV (CLOCK_DIVIDED_BY_1) /** Configure 32K clock source @ref enum CLOCK_ATTACH_TYPE_T */ +#if defined(CELL_PHONE_EN) +#define CLK_32K_SOURCE (CLOCK_EXT32K_SQUARE_TO_32K_CLK) +#else #if XTAL32K_EN #define CLK_32K_SOURCE (CLOCK_XTAL32K_TO_32K_CLK) #define LOW_POWER_CLOCK_PPM (50) #else #define CLK_32K_SOURCE (CLOCK_RCO32K_TO_32K_CLK) #define LOW_POWER_CLOCK_PPM (1000) +#endif #endif /** Enable system tick timer (period = 10ms), needed by OS */ @@ -135,60 +269,64 @@ /* ================ UWB configuration ================ */ /* =========================================================================================================================== */ +/** Enable Post-process filter */ +#define FILTER_EN (0) + +/** Enable RSSI output */ +#define RSSI_EN (1) + +/** Enable Channel status information output */ +#define CSI_EN (0) + +/** Enable PDoA 3D */ +#define PDOA_3D_EN (0) + +/** Enable AoA */ +#define AOA_EN (1) + +/** Measure angle on 1 (responder side), 2 (initiator side), 3 (both sides), 0 (None) */ +#define MEASURE_ANGLE_ON_ROLE (3) + /** TX power level: 0 ~ 60 */ -#define TX_POWER_LEVEL (55) +#define TX_POWER_LEVEL (36) -/** Antenna port number for AoA, 2~4 */ -#define RX_AOA_ANT_PORTS_NUM (4) +/** Antenna ports combination, @ref macro definition RX_xPORTS_ANT_xxx */ +#define RX_ANT_PORTS_COMBINATION (RX_4PORTS_ANT_3_0_1_2) -/** Antenna ports c ombination for AoA, @ref enum RX_ANTENNA_MODE_T */ -#define RX_AOA_ANT_PORTS_COMBINATION (RX_4PORTS_ANT_3_0_1_2) +/** Dynamic update RX main antenna, can be enabled only when 4 ports are in use */ +#define DYNAMIC_UPDATE_MAIN_ANTENNA_EN (0) -/** Antenna pattern: Linear or Square */ -#define SQUARE_4ANTS (0) +#if PDOA_3D_EN +/// Antenna pattern +#define ANT_PATTERN (ANT_PATTERN_SQUARE) +/// Antenna layout, @ref enum ANT_LAYOUT_T +#define ANT_LAYOUT (ANT_LAYOUT_HORIZONTAL) +#else +/// Antenna pattern +#define ANT_PATTERN (ANT_PATTERN_LINEAR) +#endif + +/** Enable load cap automatic tuning during ranging procedure */ +#define XTAL_AUTO_TUNE_EN (1) + +/** Enable kalman filter as post process filter, FILTER_EN should be enabled meanwhile */ +#define KF_EN (0) /** Velocity of propagation (%) */ #define VP_VAL (100) -/** Maximum PHY payload length */ -#define PHY_PAYLOAD_LEN_MAX (127) +/* ========================================== Timing configuration ======================================== */ -//#define BOXING -//#define BOXING +/// Period prefetch time for event program from wakeup - 400us+ +#define UWB_PERIOD_PREFETCH_TIME (US_TO_PHY_TIMER_COUNT(400)) +/// Event prefetch time for event program - 300us +#define UWB_EVT_PREFETCH_TIME (US_TO_PHY_TIMER_COUNT(300)) +/// RX window open in advance time - 10us +#define UWB_RX_OPEN_IN_ADVANCE (US_TO_PHY_TIMER_COUNT(10)) +/// RX window - 750us +#define UWB_RX_WINDOW (US_TO_PHY_TIMER_COUNT(750)) #define LED_PIN IO_PIN_4 -/* =========================================================================================================================== */ -/* ================ Simple Selection ================ */ -/* =========================================================================================================================== */ -//#define MK_SIMPLE_TX - - //#define MK_SIMPLE_RX - - //#define MK_DS_TWR_INIT - - //#define MK_DS_TWR_RESP - - //#define MK_DS_TWR_INIT_STS - - //#define MK_DS_TWR_RESP_STS - -#define MK_SS_TWR_DW_INIT - -//#define MK_SS_TWR_DW_RESP - #define INPUT_5V_Pin IO_PIN_11 - -#define RSSI_EN (0) -/** channel number: 2, 5, 9 */ -#define UWB_CH_NUM (5) -/** Velocity of propagation (%) */ -#define VP_VAL (100) -#define RANGING_CORR (0) -#define XTAL_AUTO_TUNE_EN (0) -//#define STS_MODE -//#define MK_MODE -#define SLEEP_COUNT 1000 -#define DW1000 - /* =========================================================================================================================== */ /* ================ End ================ */ /* =========================================================================================================================== */ -- Gitblit v1.9.3