From ddd51500a8158a571a4d3d49396de4888d3d6c44 Mon Sep 17 00:00:00 2001
From: chen <15335560115@163.com>
Date: 星期二, 15 十月 2024 15:20:44 +0800
Subject: [PATCH] 安邦车载标签V1.4，修改了DELAY_BETWEEN_TWO_FRAME_UUS从400改为1400，增加了些波形判断逻辑

---
 user_config.h |   26 ++++++++++++++------------
 1 files changed, 14 insertions(+), 12 deletions(-)

diff --git a/user_config.h b/user_config.h
index ac62784..bd57b7a 100644
--- a/user_config.h
+++ b/user_config.h
@@ -57,7 +57,7 @@
 /* =========================================================================================================================== */
 
 /** Enable trace output */
-#define TRACE_EN (0)
+#define TRACE_EN (1)
 
 /** Enable exception reboot */
 #ifndef TRACE_REBOOT_EN
@@ -68,7 +68,7 @@
 #define TRACE_STD_LIB_EN (0)
 
 /** Configure trace level for modules: BOOT | TEST | UCI | UWB | APP | DRIVER | PHY | MAC */
-#define TRACE_LVL_CONFIG_0 (0x44444004)
+#define TRACE_LVL_CONFIG_0 (0x44444004)  //yuan #define TRACE_LVL_CONFIG_0 (0x44444444)
 
 /** Configure trace level for modules: CCC | FIRA | OS */
 #define TRACE_LVL_CONFIG_1 (0x00000444)
@@ -141,7 +141,7 @@
 /** Antenna port number for AoA, 2~4 */
 #define RX_AOA_ANT_PORTS_NUM (4)
 
-/** Antenna ports combination for AoA, @ref enum RX_ANTENNA_MODE_T */
+/** Antenna ports c ombination for AoA, @ref enum RX_ANTENNA_MODE_T */
 #define RX_AOA_ANT_PORTS_COMBINATION (RX_4PORTS_ANT_3_0_1_2)
 
 /** Antenna pattern: Linear or Square */
@@ -153,6 +153,8 @@
 /** Maximum PHY payload length */
 #define PHY_PAYLOAD_LEN_MAX (127)
 
+//#define BOXING
+#define BOXING
 /* =========================================================================================================================== */
 /* ================                                     Simple Selection                                      ================ */
 /* =========================================================================================================================== */
@@ -168,19 +170,19 @@
 
  //#define MK_DS_TWR_RESP_STS
  
-//#define MK_SS_TWR_DW_INIT
+#define MK_SS_TWR_DW_INIT
 
-#define MK_SS_TWR_DW_RESP
+//#define MK_SS_TWR_DW_RESP
 
 #define INPUT_5V_Pin  IO_PIN_11
-#define RSSI_EN (1)
 
-#define ACCLERATE_DETECT_Pin IO_PIN_2
-#define SDA_PIN IO_PIN_3
-#define SER_PIN IO_PIN_3
-#define SCL_PIN IO_PIN_4
-#define SRCLK_PIN IO_PIN_8
-#define RCLK_PIN IO_PIN_7
+#define RSSI_EN (1)
+/** channel number: 2, 5, 9 */
+#define UWB_CH_NUM (9)
+/** Velocity of propagation (%) */
+#define VP_VAL (100)
+#define RANGING_CORR (0)
+#define XTAL_AUTO_TUNE_EN (0)
 /* =========================================================================================================================== */
 /* ================                                           End                                             ================ */
 /* =========================================================================================================================== */

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