From c8240d55741f0ed86099a0a8c616f4fc68372134 Mon Sep 17 00:00:00 2001
From: yincheng.zhong <634916154@qq.com>
Date: 星期四, 25 十二月 2025 10:17:55 +0800
Subject: [PATCH] OTA功能测试完成,4G超时时间异常,出现4G中断情况,等杜工修改。

---
 STM32H743/Core/Src/stm32h7xx_it.c |  119 ++++++++++++++++++++++++-----------------------------------
 1 files changed, 48 insertions(+), 71 deletions(-)

diff --git a/STM32H743/Core/Src/stm32h7xx_it.c b/STM32H743/Core/Src/stm32h7xx_it.c
index eac2b1a..990df7a 100644
--- a/STM32H743/Core/Src/stm32h7xx_it.c
+++ b/STM32H743/Core/Src/stm32h7xx_it.c
@@ -56,27 +56,6 @@
 
 /* USER CODE END 0 */
 
-/* store fault info for post-mortem inspection */
-typedef struct {
-  volatile uint32_t r0;
-  volatile uint32_t r1;
-  volatile uint32_t r2;
-  volatile uint32_t r3;
-  volatile uint32_t r12;
-  volatile uint32_t lr;
-  volatile uint32_t pc;
-  volatile uint32_t psr;
-  volatile uint32_t cfsr;
-  volatile uint32_t hfsr;
-  volatile uint32_t mmfar;
-  volatile uint32_t bfar;
-} MemFaultInfo_t;
-
-volatile MemFaultInfo_t g_memFaultInfo;
-
-void MemManage_Handler_C(uint32_t *pulFaultStackAddress);
-
-
 /* External variables --------------------------------------------------------*/
 extern TIM_HandleTypeDef htim2;
 extern TIM_HandleTypeDef htim3;
@@ -128,7 +107,49 @@
 void HardFault_Handler(void)
 {
   /* USER CODE BEGIN HardFault_IRQn 0 */
-
+    // 鎵撳嵃HardFault淇℃伅
+    // 娉ㄦ剰锛氳繖閲屽亣璁緋rintf宸茬粡閲嶅畾鍚戝埌UART锛屼笖鍦℉ardFault涓繕鑳藉伐浣�
+    // 濡傛灉涓嶈兘宸ヤ綔锛屽彲鑳介渶瑕佺洿鎺ユ搷浣滃瘎瀛樺櫒杈撳嚭
+    
+//    // 鑾峰彇SCB->HFSR, CFSR绛夊瘎瀛樺櫒鍊�
+//    volatile uint32_t hfsr = SCB->HFSR;
+//    volatile uint32_t cfsr = SCB->CFSR;
+//    volatile uint32_t mmfar = SCB->MMFAR;
+//    volatile uint32_t bfar = SCB->BFAR;
+//    
+//    printf("\r\n=== HARD FAULT ===\r\n");
+//    printf("HFSR: 0x%08X\r\n", hfsr);
+//    printf("CFSR: 0x%08X\r\n", cfsr);
+//    
+//    if (hfsr & (1 << 30)) {
+//        printf("Forced HardFault\r\n");
+//    }
+//    
+//    if (cfsr & 0xFFFF0000) {
+//        printf("Usage Fault: 0x%04X\r\n", (cfsr >> 16));
+//        if (cfsr & (1 << 24)) printf("  - UNALIGNED access\r\n");
+//        if (cfsr & (1 << 25)) printf("  - DIVBYZERO\r\n");
+//    }
+//    
+//    if (cfsr & 0x0000FF00) {
+//        printf("Bus Fault: 0x%02X\r\n", (cfsr >> 8));
+//        if (cfsr & (1 << 15)) printf("  - BFAR valid: 0x%08X\r\n", bfar);
+//        if (cfsr & (1 << 10)) printf("  - IMPRECISERR (Imprecise data bus error)\r\n");
+//        if (cfsr & (1 << 9))  printf("  - PRECISERR (Precise data bus error)\r\n");
+//        if (cfsr & (1 << 8))  printf("  - IBUSERR (Instruction bus error)\r\n");
+//    }
+//    
+//    if (cfsr & 0x000000FF) {
+//        printf("MemManage Fault: 0x%02X\r\n", cfsr & 0xFF);
+//        if (cfsr & (1 << 7)) printf("  - MMFAR valid: 0x%08X\r\n", mmfar);
+//    }
+//    
+//    // 灏濊瘯鎵撳嵃LR鍜孭C锛堥渶瑕佹眹缂栬緟鍔╋紝杩欓噷绠�鍗曟墦鍗板瘎瀛樺櫒锛�
+//    // __asm("MOV R0, LR");
+//    // __asm("MRS R1, MSP");
+//    // __asm("MRS R2, PSP");
+//    
+//    printf("System Halted.\r\n");
   /* USER CODE END HardFault_IRQn 0 */
   while (1)
   {
@@ -140,59 +161,15 @@
 /**
   * @brief This function handles Memory management fault.
   */
-//__attribute__((naked)) void MemManage_Handler(void)
-//{
-//  __ASM volatile(
-//      "TST LR, #4\n\t"
-//      "ITE EQ\n\t"
-//      "MRSEQ R0, MSP\n\t"
-//      "MRSNE R0, PSP\n\t"
-//      "B MemManage_Handler_C\n\t"
-//  );
-//}
-
-/* C handler: pulFaultStackAddress points to stacked r0, r1, r2, r3, r12, lr, pc, psr */
-void MemManage_Handler_C(uint32_t *pulFaultStackAddress)
+void MemManage_Handler(void)
 {
-  /* save stacked registers */
-  g_memFaultInfo.r0 = pulFaultStackAddress[0];
-  g_memFaultInfo.r1 = pulFaultStackAddress[1];
-  g_memFaultInfo.r2 = pulFaultStackAddress[2];
-  g_memFaultInfo.r3 = pulFaultStackAddress[3];
-  g_memFaultInfo.r12 = pulFaultStackAddress[4];
-  g_memFaultInfo.lr = pulFaultStackAddress[5];
-  g_memFaultInfo.pc = pulFaultStackAddress[6];
-  g_memFaultInfo.psr = pulFaultStackAddress[7];
+  /* USER CODE BEGIN MemoryManagement_IRQn 0 */
 
-  /* save fault status registers */
-  g_memFaultInfo.cfsr = SCB->CFSR;
-  g_memFaultInfo.hfsr = SCB->HFSR;
-  g_memFaultInfo.mmfar = SCB->MMFAR;
-  g_memFaultInfo.bfar = SCB->BFAR;
-
-  /* try to print brief info to debug UART (may not always succeed in fault context) */
-  DBG_Printf("*** MemManage Fault ***\r\n");
-  DBG_Printf("CFSR=0x%08x HFSR=0x%08x MMFAR=0x%08x BFAR=0x%08x\r\n",
-             (unsigned)g_memFaultInfo.cfsr,
-             (unsigned)g_memFaultInfo.hfsr,
-             (unsigned)g_memFaultInfo.mmfar,
-             (unsigned)g_memFaultInfo.bfar);
-  DBG_Printf("R0=0x%08x R1=0x%08x R2=0x%08x R3=0x%08x\r\n",
-             (unsigned)g_memFaultInfo.r0,
-             (unsigned)g_memFaultInfo.r1,
-             (unsigned)g_memFaultInfo.r2,
-             (unsigned)g_memFaultInfo.r3);
-  DBG_Printf("R12=0x%08x LR=0x%08x PC=0x%08x PSR=0x%08x\r\n",
-             (unsigned)g_memFaultInfo.r12,
-             (unsigned)g_memFaultInfo.lr,
-             (unsigned)g_memFaultInfo.pc,
-             (unsigned)g_memFaultInfo.psr);
-
-  /* break here for debugger, then loop forever */
-  __asm volatile ("BKPT #0");
+  /* USER CODE END MemoryManagement_IRQn 0 */
   while (1)
   {
-    __asm volatile ("WFI");
+    /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+    /* USER CODE END W1_MemoryManagement_IRQn 0 */
   }
 }
 

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