From d487f58c6be4ed22f735d12861b59b85c3a924b9 Mon Sep 17 00:00:00 2001
From: yincheng.zhong <634916154@qq.com>
Date: 星期六, 20 十二月 2025 21:53:25 +0800
Subject: [PATCH] HTTP下载路径文件成功，解析路径文件成功,CRC用的软件，硬件解析不对。准备改BOOT
---
STM32H743/Core/Src/stm32h7xx_it.c | 75 ++-----------------------------------
1 files changed, 5 insertions(+), 70 deletions(-)
diff --git a/STM32H743/Core/Src/stm32h7xx_it.c b/STM32H743/Core/Src/stm32h7xx_it.c
index eac2b1a..78808b0 100644
--- a/STM32H743/Core/Src/stm32h7xx_it.c
+++ b/STM32H743/Core/Src/stm32h7xx_it.c
@@ -56,27 +56,6 @@
/* USER CODE END 0 */
-/* store fault info for post-mortem inspection */
-typedef struct {
- volatile uint32_t r0;
- volatile uint32_t r1;
- volatile uint32_t r2;
- volatile uint32_t r3;
- volatile uint32_t r12;
- volatile uint32_t lr;
- volatile uint32_t pc;
- volatile uint32_t psr;
- volatile uint32_t cfsr;
- volatile uint32_t hfsr;
- volatile uint32_t mmfar;
- volatile uint32_t bfar;
-} MemFaultInfo_t;
-
-volatile MemFaultInfo_t g_memFaultInfo;
-
-void MemManage_Handler_C(uint32_t *pulFaultStackAddress);
-
-
/* External variables --------------------------------------------------------*/
extern TIM_HandleTypeDef htim2;
extern TIM_HandleTypeDef htim3;
@@ -140,59 +119,15 @@
/**
* @brief This function handles Memory management fault.
*/
-//__attribute__((naked)) void MemManage_Handler(void)
-//{
-// __ASM volatile(
-// "TST LR, #4\n\t"
-// "ITE EQ\n\t"
-// "MRSEQ R0, MSP\n\t"
-// "MRSNE R0, PSP\n\t"
-// "B MemManage_Handler_C\n\t"
-// );
-//}
-
-/* C handler: pulFaultStackAddress points to stacked r0, r1, r2, r3, r12, lr, pc, psr */
-void MemManage_Handler_C(uint32_t *pulFaultStackAddress)
+void MemManage_Handler(void)
{
- /* save stacked registers */
- g_memFaultInfo.r0 = pulFaultStackAddress[0];
- g_memFaultInfo.r1 = pulFaultStackAddress[1];
- g_memFaultInfo.r2 = pulFaultStackAddress[2];
- g_memFaultInfo.r3 = pulFaultStackAddress[3];
- g_memFaultInfo.r12 = pulFaultStackAddress[4];
- g_memFaultInfo.lr = pulFaultStackAddress[5];
- g_memFaultInfo.pc = pulFaultStackAddress[6];
- g_memFaultInfo.psr = pulFaultStackAddress[7];
+ /* USER CODE BEGIN MemoryManagement_IRQn 0 */
- /* save fault status registers */
- g_memFaultInfo.cfsr = SCB->CFSR;
- g_memFaultInfo.hfsr = SCB->HFSR;
- g_memFaultInfo.mmfar = SCB->MMFAR;
- g_memFaultInfo.bfar = SCB->BFAR;
-
- /* try to print brief info to debug UART (may not always succeed in fault context) */
- DBG_Printf("*** MemManage Fault ***\r\n");
- DBG_Printf("CFSR=0x%08x HFSR=0x%08x MMFAR=0x%08x BFAR=0x%08x\r\n",
- (unsigned)g_memFaultInfo.cfsr,
- (unsigned)g_memFaultInfo.hfsr,
- (unsigned)g_memFaultInfo.mmfar,
- (unsigned)g_memFaultInfo.bfar);
- DBG_Printf("R0=0x%08x R1=0x%08x R2=0x%08x R3=0x%08x\r\n",
- (unsigned)g_memFaultInfo.r0,
- (unsigned)g_memFaultInfo.r1,
- (unsigned)g_memFaultInfo.r2,
- (unsigned)g_memFaultInfo.r3);
- DBG_Printf("R12=0x%08x LR=0x%08x PC=0x%08x PSR=0x%08x\r\n",
- (unsigned)g_memFaultInfo.r12,
- (unsigned)g_memFaultInfo.lr,
- (unsigned)g_memFaultInfo.pc,
- (unsigned)g_memFaultInfo.psr);
-
- /* break here for debugger, then loop forever */
- __asm volatile ("BKPT #0");
+ /* USER CODE END MemoryManagement_IRQn 0 */
while (1)
{
- __asm volatile ("WFI");
+ /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+ /* USER CODE END W1_MemoryManagement_IRQn 0 */
}
}
--
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