From 388017aa9902a6b41dbb2adcc7cbd3cd37c38691 Mon Sep 17 00:00:00 2001
From: zhyinch <zhyinch@gmail.com>
Date: 星期四, 21 七月 2022 16:38:14 +0800
Subject: [PATCH] V1.65
---
源码/核心板/Src/decadriver/deca_params_init.c | 18 +++++++++---------
1 files changed, 9 insertions(+), 9 deletions(-)
diff --git "a/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/decadriver/deca_params_init.c" "b/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/decadriver/deca_params_init.c"
index 0e6603d..244b29a 100644
--- "a/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/decadriver/deca_params_init.c"
+++ "b/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/decadriver/deca_params_init.c"
@@ -22,10 +22,10 @@
//-----------------------------------------
// map the channel number to the index in the configuration arrays below
// 0th element is chan 1, 1st is chan 2, 2nd is chan 3, 3rd is chan 4, 4th is chan 5, 5th is chan 7
-const uint8 chan_idx[NUM_CH_SUPPORTED] = {0, 0, 1, 2, 3, 4, 0, 5};
+const uint8_t chan_idx[NUM_CH_SUPPORTED] = {0, 0, 1, 2, 3, 4, 0, 5};
//-----------------------------------------
-const uint32 tx_config[NUM_CH] =
+const uint32_t tx_config[NUM_CH] =
{
RF_TXCTRL_CH1, /* Tx value match UM */
RF_TXCTRL_CH2,
@@ -36,7 +36,7 @@
};
//RF -> Channel_Specific_Cfg -> Channel_Cfg -> RF_PLL -> RF PLL2
-const uint8 pll2_config[NUM_CH][5] =
+const uint8_t pll2_config[NUM_CH][5] =
{
{ 0x07, 0x04, 0x00, 0x09, 0x1E}, //3.5Ghz
@@ -53,7 +53,7 @@
//bandwidth configuration
-const uint8 rx_config[NUM_BW] =
+const uint8_t rx_config[NUM_BW] =
{
0xD8, //NBW
0xBC //WBW
@@ -68,10 +68,10 @@
};
-const uint8 dwnsSFDlen[NUM_BR] = { 0x40, 0x10, 0x08 }; //DW non-standard SFD length for 110k, 850k and 6.81M
+const uint8_t dwnsSFDlen[NUM_BR] = { 0x40, 0x10, 0x08 }; //DW non-standard SFD length for 110k, 850k and 6.81M
// SFD Threshold
-const uint16 sftsh[NUM_BR][NUM_SFD] =
+const uint16_t sftsh[NUM_BR][NUM_SFD] =
{
//110k
{
@@ -90,13 +90,13 @@
}
};
-const uint16 dtune1[NUM_PRF] =
+const uint16_t dtune1[NUM_PRF] =
{
0x0087, // 16 MHz PRF
0x008D // 64 MHz PRF
};
-const uint32 digital_bb_config[NUM_PRF][NUM_PACS] =
+const uint32_t digital_bb_config[NUM_PRF][NUM_PACS] =
{
//16 PRF
{
@@ -122,7 +122,7 @@
}
};
-const uint16 lde_replicaCoeff[PCODES] =
+const uint16_t lde_replicaCoeff[PCODES] =
{
// 0
--
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