From 0831d1caeb4b34103470437552d5dd331d2c6f4f Mon Sep 17 00:00:00 2001
From: guanjiao ren <guanjiao.ren@ninebot.com>
Date: 星期一, 21 五月 2018 16:25:48 +0800
Subject: [PATCH] 将uint8全部修改为uint8_t，其他以此类推
---
源码/核心板/Src/decadriver/deca_range_tables.c | 14
源码/核心板/Src/decadriver/deca_params_init.c | 18
源码/核心板/Src/OnChipDevices/Spi.c | 16
源码/核心板/MDK-ARM/Project.uvoptx | 4
源码/核心板/Src/decadriver/deca_device.c | 384 +++++++++++++-------------
源码/核心板/Src/decadriver/deca_param_types.h | 25
源码/核心板/Src/decadriver/deca_regs.h | 3
源码/核心板/Src/application/dw_app.c | 72 ++--
源码/核心板/Src/decadriver/deca_device_api.h | 265 ++++++++----------
9 files changed, 378 insertions(+), 423 deletions(-)
diff --git "a/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/MDK-ARM/Project.uvoptx" "b/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/MDK-ARM/Project.uvoptx"
index 4e5c0c6..eb36a35 100644
--- "a/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/MDK-ARM/Project.uvoptx"
+++ "b/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/MDK-ARM/Project.uvoptx"
@@ -289,7 +289,7 @@
<GroupNumber>3</GroupNumber>
<FileNumber>4</FileNumber>
<FileType>1</FileType>
- <tvExp>0</tvExp>
+ <tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\Src\decadriver\deca_device.c</PathWithFileName>
@@ -301,7 +301,7 @@
<GroupNumber>3</GroupNumber>
<FileNumber>5</FileNumber>
<FileType>1</FileType>
- <tvExp>1</tvExp>
+ <tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\Src\decadriver\deca_params_init.c</PathWithFileName>
diff --git "a/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/OnChipDevices/Spi.c" "b/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/OnChipDevices/Spi.c"
index 9ac47cf..22dd470 100644
--- "a/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/OnChipDevices/Spi.c"
+++ "b/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/OnChipDevices/Spi.c"
@@ -76,10 +76,10 @@
*/
int writetospi
(
- uint16 headerLength,
- const uint8 *headerBuffer,
- uint32 bodylength,
- const uint8 *bodyBuffer
+ uint16_t headerLength,
+ const uint8_t *headerBuffer,
+ uint32_t bodylength,
+ const uint8_t *bodyBuffer
)
{
@@ -127,10 +127,10 @@
*/
int readfromspi
(
- uint16 headerLength,
- const uint8 *headerBuffer,
- uint32 readlength,
- uint8 *readBuffer
+ uint16_t headerLength,
+ const uint8_t *headerBuffer,
+ uint32_t readlength,
+ uint8_t *readBuffer
)
{
diff --git "a/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/application/dw_app.c" "b/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/application/dw_app.c"
index 91bdfa4..db01397 100644
--- "a/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/application/dw_app.c"
+++ "b/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/application/dw_app.c"
@@ -89,37 +89,35 @@
};
/* Frames used in the ranging process. See NOTE 2 below. */
-static uint8 tx_poll_msg[] = {0x00, 0x88, 0, 0xCA, 0xDE, 'W', 'A', 'V', 'E', 0x21, 0, 0};
-//static uint8 rx_resp_msg[] = {0x41, 0x88, 0, 0xCA, 0xDE, 'V', 'E', 'W', 'A', 0x10, 0x02, 0, 0, 0, 0};
-static uint8 tx_final_msg[] = {0x41, 0x88, 0, 0xCA, 0xDE, 'W', 'A', 'V', 'E', 0x23, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
+static uint8_t tx_poll_msg[] = {0x00, 0x88, 0, 0xCA, 0xDE, 'W', 'A', 'V', 'E', 0x21, 0, 0};
+//static uint8_t rx_resp_msg[] = {0x41, 0x88, 0, 0xCA, 0xDE, 'V', 'E', 'W', 'A', 0x10, 0x02, 0, 0, 0, 0};
+static uint8_t tx_final_msg[] = {0x41, 0x88, 0, 0xCA, 0xDE, 'W', 'A', 'V', 'E', 0x23, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
-//static uint8 rx_poll_msg[] = {0x00, 0x88, 0, 0xCA, 0xDE, 'W', 'A', 'V', 'E', 0x21, 0, 0};
-static uint8 tx_resp_msg[] = {0x41, 0x88, 0, 0xCA, 0xDE, 'V', 'E', 'W', 'A', 0x10, 0x02, 0, 0, 0, 0};
-//static uint8 rx_final_msg[] = {0x41, 0x88, 0, 0xCA, 0xDE, 'W', 'A', 'V', 'E', 0x23, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
+//static uint8_t rx_poll_msg[] = {0x00, 0x88, 0, 0xCA, 0xDE, 'W', 'A', 'V', 'E', 0x21, 0, 0};
+static uint8_t tx_resp_msg[] = {0x41, 0x88, 0, 0xCA, 0xDE, 'V', 'E', 'W', 'A', 0x10, 0x02, 0, 0, 0, 0};
+//static uint8_t rx_final_msg[] = {0x41, 0x88, 0, 0xCA, 0xDE, 'W', 'A', 'V', 'E', 0x23, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
/* Frame sequence number, incremented after each transmission. */
-static uint32 frame_seq_nb = 0;
+static uint32_t frame_seq_nb = 0;
/* Hold copy of status register state here for reference, so reader can examine it at a breakpoint. */
-static uint32 status_reg = 0;
+static uint32_t status_reg = 0;
/* Buffer to store received response message.
* Its size is adjusted to longest frame that this example code is supposed to handle. */
#define RX_BUF_LEN 24
-static uint8 rx_buffer[RX_BUF_LEN];
+static uint8_t rx_buffer[RX_BUF_LEN];
/* Time-stamps of frames transmission/reception, expressed in device time units.
* As they are 40-bit wide, we need to define a 64-bit int type to handle them. */
-typedef unsigned long long uint64;
-static uint64 poll_tx_ts;
-static uint64 resp_rx_ts;
-static uint64 final_tx_ts;
+static uint64_t poll_tx_ts;
+static uint64_t resp_rx_ts;
+static uint64_t final_tx_ts;
/* Length of the common part of the message (up to and including the function code, see NOTE 2 below). */
-typedef signed long long int64;
-static uint64 poll_rx_ts;
-static uint64 resp_tx_ts;
-static uint64 final_rx_ts;
+static uint64_t poll_rx_ts;
+static uint64_t resp_tx_ts;
+static uint64_t final_rx_ts;
static double tof;
@@ -143,10 +141,10 @@
*
* @return 64-bit value of the read time-stamp.
*/
-static uint64 get_tx_timestamp_u64(void)
+static uint64_t get_tx_timestamp_u64(void)
{
- uint8 ts_tab[5];
- uint64 ts = 0;
+ uint8_t ts_tab[5];
+ uint64_t ts = 0;
int i;
dwt_readtxtimestamp(ts_tab);
for (i = 4; i >= 0; i--)
@@ -167,10 +165,10 @@
*
* @return 64-bit value of the read time-stamp.
*/
-static uint64 get_rx_timestamp_u64(void)
+static uint64_t get_rx_timestamp_u64(void)
{
- uint8 ts_tab[5];
- uint64 ts = 0;
+ uint8_t ts_tab[5];
+ uint64_t ts = 0;
int i;
dwt_readrxtimestamp(ts_tab);
for (i = 4; i >= 0; i--)
@@ -192,17 +190,17 @@
*
* @return none
*/
-static void final_msg_set_ts(uint8 *ts_field, uint64 ts)
+static void final_msg_set_ts(uint8_t *ts_field, uint64_t ts)
{
int i;
for (i = 0; i < FINAL_MSG_TS_LEN; i++)
{
- ts_field[i] = (uint8) ts;
+ ts_field[i] = (uint8_t) ts;
ts >>= 8;
}
}
-static void final_msg_get_ts(const uint8 *ts_field, uint32 *ts)
+static void final_msg_get_ts(const uint8_t *ts_field, uint32_t *ts)
{
int i;
*ts = 0;
@@ -236,8 +234,8 @@
void Tag_App(void)//发送模式(TAG标签)
{
- uint32 frame_len;
- uint32 final_tx_time;
+ uint32_t frame_len;
+ uint32_t final_tx_time;
/* Write frame data to DW1000 and prepare transmission. See NOTE 7 below. */
tx_poll_msg[ALL_MSG_SN_IDX] = frame_seq_nb;
@@ -282,7 +280,7 @@
dwt_setdelayedtrxtime(final_tx_time);//设置final包发送时间T5
/* Final TX timestamp is the transmission time we programmed plus the TX antenna delay. */
- final_tx_ts = (((uint64)(final_tx_time & 0xFFFFFFFE)) << 8) + TX_ANT_DLY;//final包实际发送时间是计算时间加上发送天线delay
+ final_tx_ts = (((uint64_t)(final_tx_time & 0xFFFFFFFE)) << 8) + TX_ANT_DLY;//final包实际发送时间是计算时间加上发送天线delay
/* Write all timestamps in the final message. See NOTE 10 below. */
final_msg_set_ts(&tx_final_msg[FINAL_MSG_POLL_TX_TS_IDX], poll_tx_ts);//将T1，T4，T5写入发送数据
@@ -344,8 +342,8 @@
void Anchor_App(void)
{
- uint32 frame_len;
- uint32 resp_tx_time;
+ uint32_t frame_len;
+ uint32_t resp_tx_time;
/* Clear reception timeout to start next ranging process. */
dwt_setrxtimeout(0);//设定接收超时时间，0位没有超时时间
@@ -421,8 +419,8 @@
rx_buffer[ALL_MSG_SN_IDX] = 0;
if (rx_buffer[9] == 0x23) //判断是否为Final包
{
- uint32 poll_tx_ts, resp_rx_ts, final_tx_ts;
- uint32 poll_rx_ts_32, resp_tx_ts_32, final_rx_ts_32;
+ uint32_t poll_tx_ts, resp_rx_ts, final_tx_ts;
+ uint32_t poll_rx_ts_32, resp_tx_ts_32, final_rx_ts_32;
double Ra, Rb, Da, Db;
int64_t tof_dtu;
@@ -436,14 +434,14 @@
final_msg_get_ts(&rx_buffer[FINAL_MSG_FINAL_TX_TS_IDX], &final_tx_ts);
/* Compute time of flight. 32-bit subtractions give correct answers even if clock has wrapped. See NOTE 10 below. */
- poll_rx_ts_32 = (uint32)poll_rx_ts;//使用32位数据计算
- resp_tx_ts_32 = (uint32)resp_tx_ts;
- final_rx_ts_32 = (uint32)final_rx_ts;
+ poll_rx_ts_32 = (uint32_t)poll_rx_ts;//使用32位数据计算
+ resp_tx_ts_32 = (uint32_t)resp_tx_ts;
+ final_rx_ts_32 = (uint32_t)final_rx_ts;
Ra = (double)(resp_rx_ts - poll_tx_ts);//Tround1 = T4 - T1
Rb = (double)(final_rx_ts_32 - resp_tx_ts_32);//Tround2 = T6 - T3
Da = (double)(final_tx_ts - resp_rx_ts);//Treply2 = T5 - T4
Db = (double)(resp_tx_ts_32 - poll_rx_ts_32);//Treply1 = T3 - T2
- tof_dtu = (int64)((Ra * Rb - Da * Db) / (Ra + Rb + Da + Db));//计算公式
+ tof_dtu = (int64_t)((Ra * Rb - Da * Db) / (Ra + Rb + Da + Db));//计算公式
tof = tof_dtu * DWT_TIME_UNITS;
distance = tof * SPEED_OF_LIGHT;//距离=光速*飞行时间
diff --git "a/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/decadriver/deca_device.c" "b/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/decadriver/deca_device.c"
index 407d576..40dfb9c 100644
--- "a/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/decadriver/deca_device.c"
+++ "b/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/decadriver/deca_device.c"
@@ -10,7 +10,7 @@
*
*/
-#include "deca_types.h"
+#include <stddef.h>
#include "deca_param_types.h"
#include "deca_regs.h"
#include "deca_device_api.h"
@@ -41,9 +41,9 @@
// Load ucode from OTP/ROM
void _dwt_loaducodefromrom(void);
// Read non-volatile memory
-uint32 _dwt_otpread(uint32 address);
+uint32_t _dwt_otpread(uint32_t address);
// Program the non-volatile memory
-uint32 _dwt_otpprogword32(uint32 data, uint16 address);
+uint32_t _dwt_otpprogword32(uint32_t data, uint16_t address);
// Upload the device configuration into always on memory
void _dwt_aonarrayupload(void);
// -------------------------------------------------------------------------------------------------------------------
@@ -56,21 +56,21 @@
// Structure to hold device data
typedef struct
{
- uint32 deviceID ;
- uint32 partID ;
- uint32 lotID ;
- uint8 chan; // Added channel here - used in the reading of accumulator
- uint8 longFrames ; // Flag in non-standard long frame mode
- uint8 otprev ; // OTP revision number (read during initialisation)
- uint32 txFCTRL ; // Keep TX_FCTRL register config
- uint8 xtrim; // XTAL trim value read from OTP
- uint8 dblbuffon; // Double RX buffer mode flag
- uint32 sysCFGreg ; // Local copy of system config register
- uint16 sleep_mode; // Used for automatic reloading of LDO tune and microcode at wake-up
+ uint32_t deviceID ;
+ uint32_t partID ;
+ uint32_t lotID ;
+ uint8_t chan; // Added channel here - used in the reading of accumulator
+ uint8_t longFrames ; // Flag in non-standard long frame mode
+ uint8_t otprev ; // OTP revision number (read during initialisation)
+ uint32_t txFCTRL ; // Keep TX_FCTRL register config
+ uint8_t xtrim; // XTAL trim value read from OTP
+ uint8_t dblbuffon; // Double RX buffer mode flag
+ uint32_t sysCFGreg ; // Local copy of system config register
+ uint16_t sleep_mode; // Used for automatic reloading of LDO tune and microcode at wake-up
dwt_callback_data_t cdata; // Callback data structure
- uint8 wait4resp ; // wait4response was set with last TX start command
+ uint8_t wait4resp ; // wait4response was set with last TX start command
int prfIndex ;
void (*dwt_txcallback)(const dwt_callback_data_t *txd);
@@ -110,11 +110,11 @@
#define VTEMP_ADDRESS (0x09)
#define XTRIM_ADDRESS (0x1E)
-int dwt_initialise(uint16 config)
+int dwt_initialise(uint16_t config)
{
- uint8 plllockdetect = EC_CTRL_PLLLCK;
- uint16 otp_addr = 0;
- uint32 ldo_tune = 0;
+ uint8_t plllockdetect = EC_CTRL_PLLLCK;
+ uint16_t otp_addr = 0;
+ uint32_t ldo_tune = 0;
dw1000local.dblbuffon = 0; // Double buffer mode off by default
dw1000local.prfIndex = 0; // 16MHz
@@ -146,7 +146,7 @@
ldo_tune = _dwt_otpread(LDOTUNE_ADDRESS);
if((ldo_tune & 0xFF) != 0)
{
- uint8 ldok = OTP_SF_LDO_KICK;
+ uint8_t ldok = OTP_SF_LDO_KICK;
// Kick LDO tune
dwt_writetodevice(OTP_IF_ID, OTP_SF, 1, &ldok); // Set load LDE kick bit
dw1000local.sleep_mode |= AON_WCFG_ONW_LLDO; // LDO tune must be kicked at wake-up
@@ -173,7 +173,7 @@
}
else // Should disable the LDERUN enable bit in 0x36, 0x4
{
- uint16 rega = dwt_read16bitoffsetreg(PMSC_ID, PMSC_CTRL1_OFFSET + 1) ;
+ uint16_t rega = dwt_read16bitoffsetreg(PMSC_ID, PMSC_CTRL1_OFFSET + 1) ;
rega &= 0xFDFF ; // Clear LDERUN bit
dwt_write16bitoffsetreg(PMSC_ID, PMSC_CTRL1_OFFSET + 1, rega) ;
}
@@ -198,7 +198,7 @@
*
* returns the read OTP revision value
*/
-uint8 dwt_otprevision(void)
+uint8_t dwt_otprevision(void)
{
return dw1000local.otprev ;
}
@@ -216,7 +216,7 @@
*/
void dwt_setGPIOforEXTTRX(void)
{
- uint8 buf[GPIO_MODE_LEN];
+ uint8_t buf[GPIO_MODE_LEN];
// Set the GPIO to control external PA/LNA
dwt_readfromdevice(GPIO_CTRL_ID, GPIO_MODE_OFFSET, GPIO_MODE_LEN, buf);
@@ -240,10 +240,10 @@
*
* no return value
*/
-void dwt_setGPIOdirection(uint32 gpioNum, uint32 direction)
+void dwt_setGPIOdirection(uint32_t gpioNum, uint32_t direction)
{
- uint8 buf[GPIO_DIR_LEN];
- uint32 command = direction | gpioNum;
+ uint8_t buf[GPIO_DIR_LEN];
+ uint32_t command = direction | gpioNum;
buf[0] = command & 0xff;
buf[1] = (command >> 8) & 0xff;
@@ -265,10 +265,10 @@
*
* no return value
*/
-void dwt_setGPIOvalue(uint32 gpioNum, uint32 value)
+void dwt_setGPIOvalue(uint32_t gpioNum, uint32_t value)
{
- uint8 buf[GPIO_DOUT_LEN];
- uint32 command = value | gpioNum;
+ uint8_t buf[GPIO_DOUT_LEN];
+ uint32_t command = value | gpioNum;
buf[0] = command & 0xff;
buf[1] = (command >> 8) & 0xff;
@@ -288,7 +288,7 @@
*
* returns the 32 bit part ID value as programmed in the factory
*/
-uint32 dwt_getpartid(void)
+uint32_t dwt_getpartid(void)
{
return dw1000local.partID;
}
@@ -304,7 +304,7 @@
*
* returns the 32 bit lot ID value as programmed in the factory
*/
-uint32 dwt_getlotid(void)
+uint32_t dwt_getlotid(void)
{
return dw1000local.lotID;
}
@@ -320,7 +320,7 @@
*
* returns the read value which for DW1000 is 0xDECA0130
*/
-uint32 dwt_readdevid(void)
+uint32_t dwt_readdevid(void)
{
return dwt_read32bitoffsetreg(DEV_ID_ID, 0);
}
@@ -367,13 +367,13 @@
*/
int dwt_configure(dwt_config_t *config)
{
- uint8 nsSfd_result = 0;
- uint8 useDWnsSFD = 0;
- uint8 chan = config->chan ;
- uint32 regval ;
- uint16 reg16 = lde_replicaCoeff[config->rxCode];
- uint8 prfIndex = dw1000local.prfIndex = config->prf - DWT_PRF_16M;
- uint8 bw = ((chan == 4) || (chan == 7)) ? 1 : 0 ; // Select wide or narrow band
+ uint8_t nsSfd_result = 0;
+ uint8_t useDWnsSFD = 0;
+ uint8_t chan = config->chan ;
+ uint32_t regval ;
+ uint16_t reg16 = lde_replicaCoeff[config->rxCode];
+ uint8_t prfIndex = dw1000local.prfIndex = config->prf - DWT_PRF_16M;
+ uint8_t bw = ((chan == 4) || (chan == 7)) ? 1 : 0 ; // Select wide or narrow band
dw1000local.chan = config->chan ;
@@ -473,13 +473,13 @@
{
if(config->txPreambLength == DWT_PLEN_64)
{
- uint8 temp = 0x10;
+ uint8_t temp = 0x10;
dwt_write16bitoffsetreg(DRX_CONF_ID, DRX_TUNE1b_OFFSET, 0x10);
dwt_writetodevice(DRX_CONF_ID, 0x26, 1, &temp);
}
else
{
- uint8 temp = 0x28;
+ uint8_t temp = 0x28;
dwt_write16bitoffsetreg(DRX_CONF_ID, DRX_TUNE1b_OFFSET, 0x20);
dwt_writetodevice(DRX_CONF_ID, 0x26, 1, &temp);
}
@@ -541,7 +541,7 @@
*
* no return value
*/
-void dwt_setrxantennadelay(uint16 rxDelay)
+void dwt_setrxantennadelay(uint16_t rxDelay)
{
// Set the RX antenna delay for auto TX timestamp adjustment
dwt_write16bitoffsetreg(LDE_IF_ID, LDE_RXANTD_OFFSET, rxDelay);
@@ -560,7 +560,7 @@
*
* no return value
*/
-void dwt_settxantennadelay(uint16 txDelay)
+void dwt_settxantennadelay(uint16_t txDelay)
{
// Set the TX antenna delay for auto TX timestamp adjustment
dwt_write16bitoffsetreg(TX_ANTD_ID, 0x0, txDelay);
@@ -586,7 +586,7 @@
*
* returns DWT_SUCCESS for success, or DWT_ERROR for error
*/
-int dwt_writetxdata(uint16 txFrameLength, uint8 *txFrameBytes, uint16 txBufferOffset)
+int dwt_writetxdata(uint16_t txFrameLength, uint8_t *txFrameBytes, uint16_t txBufferOffset)
{
#ifdef DWT_API_ERROR_CHECK
if (dw1000local.longFrames)
@@ -636,7 +636,7 @@
*
* returns DWT_SUCCESS for success, or DWT_ERROR for error
*/
-int dwt_writetxfctrl(uint16 txFrameLength, uint16 txBufferOffset)
+int dwt_writetxfctrl(uint16_t txFrameLength, uint16_t txBufferOffset)
{
#ifdef DWT_API_ERROR_CHECK
@@ -662,7 +662,7 @@
// Write the frame length to the TX frame control register
// dw1000local.txFCTRL has kept configured bit rate information
- uint32 reg32 = dw1000local.txFCTRL | txFrameLength | (txBufferOffset << 22);
+ uint32_t reg32 = dw1000local.txFCTRL | txFrameLength | (txBufferOffset << 22);
dwt_write32bitoffsetreg(TX_FCTRL_ID, 0, reg32) ;
return DWT_SUCCESS ;
@@ -684,7 +684,7 @@
*
* no return value
*/
-void dwt_readrxdata(uint8 *buffer, uint16 length, uint16 rxBufferOffset)
+void dwt_readrxdata(uint8_t *buffer, uint16_t length, uint16_t rxBufferOffset)
{
dwt_readfromdevice(RX_BUFFER_ID, rxBufferOffset, length, buffer) ;
}
@@ -703,7 +703,7 @@
*
* no return value
*/
-void dwt_readaccdata(uint8 *buffer, uint16 len, uint16 accOffset)
+void dwt_readaccdata(uint8_t *buffer, uint16_t len, uint16_t accOffset)
{
// Force on the ACC clocks if we are sequenced
_dwt_enableclocks(READ_ACC_ON);
@@ -734,7 +734,7 @@
diagnostics->maxNoise = dwt_read16bitoffsetreg(LDE_IF_ID, LDE_THRESH_OFFSET);
// Read all 8 bytes in one SPI transaction
- dwt_readfromdevice(RX_FQUAL_ID, 0x0, 8, (uint8 *)&diagnostics->stdNoise);
+ dwt_readfromdevice(RX_FQUAL_ID, 0x0, 8, (uint8_t *)&diagnostics->stdNoise);
//diagnostics->stdNoise = dwt_read16bitoffsetreg(RX_FQUAL_ID, 0x0) ;
//diagnostics->firstPathAmp2 = dwt_read16bitoffsetreg(RX_FQUAL_ID, 0x2) ;
//diagnostics->firstPathAmp3 = dwt_read16bitoffsetreg(RX_FQUAL_ID, 0x4) ;
@@ -761,7 +761,7 @@
*
* no return value
*/
-void dwt_readtxtimestamp(uint8 *timestamp)
+void dwt_readtxtimestamp(uint8_t *timestamp)
{
dwt_readfromdevice(TX_TIME_ID, 0, TX_TIME_TX_STAMP_LEN, timestamp) ; // Read bytes directly into buffer
}
@@ -777,7 +777,7 @@
*
* returns high 32-bits of TX timestamp
*/
-uint32 dwt_readtxtimestamphi32(void)
+uint32_t dwt_readtxtimestamphi32(void)
{
return dwt_read32bitoffsetreg(TX_TIME_ID, 1);
}
@@ -793,7 +793,7 @@
*
* returns low 32-bits of TX timestamp
*/
-uint32 dwt_readtxtimestamplo32(void)
+uint32_t dwt_readtxtimestamplo32(void)
{
return dwt_read32bitoffsetreg(TX_TIME_ID, 0);
}
@@ -810,7 +810,7 @@
*
* no return value
*/
-void dwt_readrxtimestamp(uint8 *timestamp)
+void dwt_readrxtimestamp(uint8_t *timestamp)
{
dwt_readfromdevice(RX_TIME_ID, 0, RX_TIME_RX_STAMP_LEN, timestamp) ; // Get the adjusted time of arrival
}
@@ -826,7 +826,7 @@
*
* returns high 32-bits of RX timestamp
*/
-uint32 dwt_readrxtimestamphi32(void)
+uint32_t dwt_readrxtimestamphi32(void)
{
return dwt_read32bitoffsetreg(RX_TIME_ID, 1);
}
@@ -842,7 +842,7 @@
*
* returns low 32-bits of RX timestamp
*/
-uint32 dwt_readrxtimestamplo32(void)
+uint32_t dwt_readrxtimestamplo32(void)
{
return dwt_read32bitoffsetreg(RX_TIME_ID, 0);
}
@@ -858,7 +858,7 @@
*
* returns high 32-bits of system time timestamp
*/
-uint32 dwt_readsystimestamphi32(void)
+uint32_t dwt_readsystimestamphi32(void)
{
return dwt_read32bitoffsetreg(SYS_TIME_ID, 1);
}
@@ -876,7 +876,7 @@
*
* no return value
*/
-void dwt_readsystime(uint8 *timestamp)
+void dwt_readsystime(uint8_t *timestamp)
{
dwt_readfromdevice(SYS_TIME_ID, 0, SYS_TIME_LEN, timestamp) ;
}
@@ -907,13 +907,13 @@
*/
int dwt_writetodevice
(
- uint16 recordNumber,
- uint16 index,
- uint32 length,
- const uint8 *buffer
+ uint16_t recordNumber,
+ uint16_t index,
+ uint32_t length,
+ const uint8_t *buffer
)
{
- uint8 header[3] ; // Buffer to compose header in
+ uint8_t header[3] ; // Buffer to compose header in
int cnt = 0; // Counter for length of header
#ifdef DWT_API_ERROR_CHECK
if (recordNumber > 0x3F)
@@ -943,12 +943,12 @@
if (index <= 127) // For non-zero index < 127, just a single sub-index byte is required
{
- header[cnt++] = (uint8)index ; // Bit-7 zero means no extension, bits 6-0 is index.
+ header[cnt++] = (uint8_t)index ; // Bit-7 zero means no extension, bits 6-0 is index.
}
else
{
- header[cnt++] = 0x80 | (uint8)(index) ; // Bit-7 one means extended index, bits 6-0 is low seven bits of index.
- header[cnt++] = (uint8) (index >> 7) ; // 8-bit value = high eight bits of index.
+ header[cnt++] = 0x80 | (uint8_t)(index) ; // Bit-7 one means extended index, bits 6-0 is low seven bits of index.
+ header[cnt++] = (uint8_t) (index >> 7) ; // 8-bit value = high eight bits of index.
}
}
@@ -982,13 +982,13 @@
*/
int dwt_readfromdevice
(
- uint16 recordNumber,
- uint16 index,
- uint32 length,
- uint8 *buffer
+ uint16_t recordNumber,
+ uint16_t index,
+ uint32_t length,
+ uint8_t *buffer
)
{
- uint8 header[3] ; // Buffer to compose header in
+ uint8_t header[3] ; // Buffer to compose header in
int cnt = 0; // Counter for length of header
#ifdef DWT_API_ERROR_CHECK
if (recordNumber > 0x3F)
@@ -1000,7 +1000,7 @@
// Write message header selecting READ operation and addresses as appropriate (this is one to three bytes long)
if (index == 0) // For index of 0, no sub-index is required
{
- header[cnt++] = (uint8) recordNumber ; // Bit-7 zero is READ operation, bit-6 zero=NO sub-addressing, bits 5-0 is reg file id
+ header[cnt++] = (uint8_t) recordNumber ; // Bit-7 zero is READ operation, bit-6 zero=NO sub-addressing, bits 5-0 is reg file id
}
else
{
@@ -1014,16 +1014,16 @@
return DWT_ERROR ; // Sub-addressable area is limited to 15-bits.
}
#endif
- header[cnt++] = (uint8)(0x40 | recordNumber) ; // Bit-7 zero is READ operation, bit-6 one=sub-address follows, bits 5-0 is reg file id
+ header[cnt++] = (uint8_t)(0x40 | recordNumber) ; // Bit-7 zero is READ operation, bit-6 one=sub-address follows, bits 5-0 is reg file id
if (index <= 127) // For non-zero index < 127, just a single sub-index byte is required
{
- header[cnt++] = (uint8) index ; // Bit-7 zero means no extension, bits 6-0 is index.
+ header[cnt++] = (uint8_t) index ; // Bit-7 zero means no extension, bits 6-0 is index.
}
else
{
- header[cnt++] = 0x80 | (uint8)(index) ; // Bit-7 one means extended index, bits 6-0 is low seven bits of index.
- header[cnt++] = (uint8) (index >> 7) ; // 8-bit value = high eight bits of index.
+ header[cnt++] = 0x80 | (uint8_t)(index) ; // Bit-7 one means extended index, bits 6-0 is low seven bits of index.
+ header[cnt++] = (uint8_t) (index >> 7) ; // 8-bit value = high eight bits of index.
}
}
@@ -1047,11 +1047,11 @@
*
* returns 32 bit register value (success), or DWT_ERROR for error
*/
-uint32 dwt_read32bitoffsetreg(int regFileID, int regOffset)
+uint32_t dwt_read32bitoffsetreg(int regFileID, int regOffset)
{
- uint32 regval = (uint32)DWT_ERROR ;
+ uint32_t regval = (uint32_t)DWT_ERROR ;
int j ;
- uint8 buffer[4] ;
+ uint8_t buffer[4] ;
int result = dwt_readfromdevice(regFileID, regOffset, 4, buffer); // Read 4 bytes (32-bits) register into buffer
@@ -1079,10 +1079,10 @@
*
* returns 16 bit register value (success), or DWT_ERROR for error
*/
-uint16 dwt_read16bitoffsetreg(int regFileID, int regOffset)
+uint16_t dwt_read16bitoffsetreg(int regFileID, int regOffset)
{
- uint16 regval = (uint16)DWT_ERROR ;
- uint8 buffer[2] ;
+ uint16_t regval = (uint16_t)DWT_ERROR ;
+ uint8_t buffer[2] ;
int result = dwt_readfromdevice(regFileID, regOffset, 2, buffer); // Read 2 bytes (16-bits) register into buffer
@@ -1108,10 +1108,10 @@
*
* returns DWT_SUCCESS for success, or DWT_ERROR for error
*/
-int dwt_write16bitoffsetreg(int regFileID, int regOffset, uint16 regval)
+int dwt_write16bitoffsetreg(int regFileID, int regOffset, uint16_t regval)
{
int reg;
- uint8 buffer[2] ;
+ uint8_t buffer[2] ;
buffer[0] = regval & 0xFF;
buffer[1] = regval >> 8 ;
@@ -1136,11 +1136,11 @@
*
* returns DWT_SUCCESS for success, or DWT_ERROR for error
*/
-int dwt_write32bitoffsetreg(int regFileID, int regOffset, uint32 regval)
+int dwt_write32bitoffsetreg(int regFileID, int regOffset, uint32_t regval)
{
int j ;
int reg;
- uint8 buffer[4] ;
+ uint8_t buffer[4] ;
for ( j = 0 ; j < 4 ; j++ )
{
@@ -1174,9 +1174,9 @@
*
* no return value
*/
-void dwt_enableframefilter(uint16 enable)
+void dwt_enableframefilter(uint16_t enable)
{
- uint32 sysconfig = SYS_CFG_MASK & dwt_read32bitreg(SYS_CFG_ID) ; // Read sysconfig register
+ uint32_t sysconfig = SYS_CFG_MASK & dwt_read32bitreg(SYS_CFG_ID) ; // Read sysconfig register
if(enable)
{
@@ -1205,7 +1205,7 @@
*
* no return value
*/
-void dwt_setpanid(uint16 panID)
+void dwt_setpanid(uint16_t panID)
{
// PAN ID is high 16 bits of register
dwt_write16bitoffsetreg(PANADR_ID, 2, panID) ;
@@ -1223,7 +1223,7 @@
*
* no return value
*/
-void dwt_setaddress16(uint16 shortAddress)
+void dwt_setaddress16(uint16_t shortAddress)
{
// Short address into low 16 bits
dwt_write16bitoffsetreg(PANADR_ID, 0, shortAddress) ;
@@ -1241,7 +1241,7 @@
*
* no return value
*/
-void dwt_seteui(uint8 *eui64)
+void dwt_seteui(uint8_t *eui64)
{
dwt_writetodevice(EUI_64_ID, 0x0, 8, eui64);
}
@@ -1258,7 +1258,7 @@
*
* no return value
*/
-void dwt_geteui(uint8 *eui64)
+void dwt_geteui(uint8_t *eui64)
{
dwt_readfromdevice(EUI_64_ID, 0x0, 8, eui64);
}
@@ -1277,7 +1277,7 @@
*
* no return value
*/
-void dwt_otpread(uint32 address, uint32 *array, uint8 length)
+void dwt_otpread(uint32_t address, uint32_t *array, uint8_t length)
{
int i;
@@ -1305,10 +1305,10 @@
*
* returns the 32bit of read data
*/
-uint32 _dwt_otpread(uint32 address)
+uint32_t _dwt_otpread(uint32_t address)
{
- uint8 buf[4];
- uint32 ret_data;
+ uint8_t buf[4];
+ uint32_t ret_data;
buf[1] = (address >> 8) & 0xff;
buf[0] = address & 0xff;
@@ -1349,11 +1349,11 @@
*
* returns DWT_SUCCESS for success, or DWT_ERROR for error
*/
-uint32 _dwt_otpsetmrregs(int mode)
+uint32_t _dwt_otpsetmrregs(int mode)
{
- uint8 rd_buf[4];
- uint8 wr_buf[4];
- uint32 mra = 0, mrb = 0, mr = 0;
+ uint8_t rd_buf[4];
+ uint8_t wr_buf[4];
+ uint32_t mra = 0, mrb = 0, mr = 0;
//printf("OTP SET MR: Setting MR,MRa,MRb for mode %2x\n",mode);
// PROGRAMME MRA
@@ -1396,7 +1396,7 @@
break;
default :
// printf("OTP SET MR: ERROR : Invalid mode selected\n",mode);
- return (uint32)DWT_ERROR;
+ return (uint32_t)DWT_ERROR;
}
wr_buf[0] = mra & 0x00ff;
@@ -1518,11 +1518,11 @@
*
* returns DWT_SUCCESS for success, or DWT_ERROR for error
*/
-uint32 _dwt_otpprogword32(uint32 data, uint16 address)
+uint32_t _dwt_otpprogword32(uint32_t data, uint16_t address)
{
- uint8 rd_buf[1];
- uint8 wr_buf[4];
- uint8 otp_done;
+ uint8_t rd_buf[1];
+ uint8_t wr_buf[4];
+ uint8_t otp_done;
// Read status register
dwt_readfromdevice(OTP_IF_ID, OTP_STAT, 1, rd_buf);
@@ -1530,7 +1530,7 @@
if((rd_buf[0] & 0x02) != 0x02)
{
// printf("OTP PROG 32: ERROR VPP NOT OK, programming will fail. Are MR/MRA/MRB set?\n");
- return (uint32)DWT_ERROR;
+ return (uint32_t)DWT_ERROR;
}
// Write the data
@@ -1580,7 +1580,7 @@
*
* returns DWT_SUCCESS for success, or DWT_ERROR for error
*/
-uint32 dwt_otpwriteandverify(uint32 value, uint16 address)
+uint32_t dwt_otpwriteandverify(uint32_t value, uint16_t address)
{
int prog_ok = DWT_SUCCESS;
int retry = 0;
@@ -1637,7 +1637,7 @@
*/
void _dwt_aonconfigupload(void)
{
- uint8 buf[1];
+ uint8_t buf[1];
buf[0] = 0x04;
dwt_writetodevice(AON_ID, AON_CTRL_OFFSET, 1, buf);
@@ -1659,7 +1659,7 @@
*/
void _dwt_aonarrayupload(void)
{
- uint8 buf[1];
+ uint8_t buf[1];
buf[0] = 0x00;
dwt_writetodevice(AON_ID, AON_CTRL_OFFSET, 1, buf);
@@ -1699,9 +1699,9 @@
*
* no return value
*/
-void dwt_configuresleepcnt(uint16 sleepcnt)
+void dwt_configuresleepcnt(uint16_t sleepcnt)
{
- uint8 buf[2];
+ uint8_t buf[2];
buf[0] = 0x01;
dwt_writetodevice(PMSC_ID, PMSC_CTRL0_OFFSET, 1, buf);
@@ -1743,10 +1743,10 @@
*
* returns the number of XTAL/2 cycles per low-power oscillator cycle. LP OSC frequency = 19.2 MHz/return value
*/
-uint16 dwt_calibratesleepcnt(void)
+uint16_t dwt_calibratesleepcnt(void)
{
- uint8 buf[2];
- uint16 result;
+ uint8_t buf[2];
+ uint16_t result;
// Enable cal of the sleep counter
buf[0] = 4;
@@ -1840,9 +1840,9 @@
*
* no return value
*/
-void dwt_configuresleep(uint16 mode, uint8 wake)
+void dwt_configuresleep(uint16_t mode, uint8_t wake)
{
- uint8 buf[1];
+ uint8_t buf[1];
// Add predefined sleep settings before writing the mode
mode |= dw1000local.sleep_mode;
@@ -1871,7 +1871,7 @@
*/
void dwt_entersleepaftertx(int enable)
{
- uint32 reg = dwt_read32bitoffsetreg(PMSC_ID, PMSC_CTRL1_OFFSET);
+ uint32_t reg = dwt_read32bitoffsetreg(PMSC_ID, PMSC_CTRL1_OFFSET);
// Set the auto TX -> sleep bit
if(enable)
{
@@ -1908,7 +1908,7 @@
*
* returns DWT_SUCCESS for success, or DWT_ERROR for error
*/
-int dwt_spicswakeup(uint8 *buff, uint16 length)
+int dwt_spicswakeup(uint8_t *buff, uint16_t length)
{
if(dwt_readdevid() != DWT_DEVICE_ID) // Device was in deep sleep (the first read fails)
{
@@ -1946,17 +1946,17 @@
*/
void _dwt_configlde(int prfIndex)
{
- uint8 x = LDE_PARAM1;
+ uint8_t x = LDE_PARAM1;
dwt_writetodevice( LDE_IF_ID, LDE_CFG1_OFFSET, 1, &x ); // 8-bit configuration register
if(prfIndex)
{
- dwt_write16bitoffsetreg( LDE_IF_ID, LDE_CFG2_OFFSET, (uint16) LDE_PARAM3_64); // 16-bit LDE configuration tuning register
+ dwt_write16bitoffsetreg( LDE_IF_ID, LDE_CFG2_OFFSET, (uint16_t) LDE_PARAM3_64); // 16-bit LDE configuration tuning register
}
else
{
- dwt_write16bitoffsetreg( LDE_IF_ID, LDE_CFG2_OFFSET, (uint16) LDE_PARAM3_16);
+ dwt_write16bitoffsetreg( LDE_IF_ID, LDE_CFG2_OFFSET, (uint16_t) LDE_PARAM3_16);
}
}
@@ -1974,7 +1974,7 @@
*/
void _dwt_loaducodefromrom(void)
{
- uint8 wr_buf[2];
+ uint8_t wr_buf[2];
// Set up clocks
wr_buf[1] = 0x03;
@@ -2004,10 +2004,10 @@
*
* no return value
*/
-void dwt_loadopsettabfromotp(uint8 gtab_sel)
+void dwt_loadopsettabfromotp(uint8_t gtab_sel)
{
- uint8 wr_buf[2];
- uint16 reg = (((gtab_sel & 0x3) << 5) | 0x1);
+ uint8_t wr_buf[2];
+ uint16_t reg = (((gtab_sel & 0x3) << 5) | 0x1);
// Set up clocks
wr_buf[1] = 0x03;
wr_buf[0] = 0x01;
@@ -2065,7 +2065,7 @@
*
* no return value
*/
-void dwt_enableautoack(uint8 responseDelayTime)
+void dwt_enableautoack(uint8_t responseDelayTime)
{
// Set auto ACK reply delay
dwt_write16bitoffsetreg(ACK_RESP_T_ID, 0x2, (responseDelayTime << 8) ) ; //in symbols
@@ -2118,7 +2118,7 @@
*/
void dwt_setautorxreenable(int enable)
{
- uint8 byte = 0;
+ uint8_t byte = 0;
if(enable)
{
@@ -2148,9 +2148,9 @@
*
* no return value
*/
-void dwt_setrxaftertxdelay(uint32 rxDelayTime)
+void dwt_setrxaftertxdelay(uint32_t rxDelayTime)
{
- uint32 val = dwt_read32bitreg(ACK_RESP_T_ID) ; // Read ACK_RESP_T_ID register
+ uint32_t val = dwt_read32bitreg(ACK_RESP_T_ID) ; // Read ACK_RESP_T_ID register
val &= ~(ACK_RESP_T_W4R_TIM_MASK) ; // Clear the timer (19:0)
@@ -2190,9 +2190,9 @@
*
* return value is 1 if the IRQS bit is set and 0 otherwise
*/
-uint8 dwt_checkIRQ(void)
+uint8_t dwt_checkIRQ(void)
{
- uint8 temp;
+ uint8_t temp;
dwt_readfromdevice(SYS_STATUS_ID, 0, 1, &temp);
@@ -2217,8 +2217,8 @@
*/
void dwt_isr(void) // Assume interrupt can supply context
{
- uint32 status = 0;
- uint32 clear = 0; // Will clear any events seen
+ uint32_t status = 0;
+ uint32_t clear = 0; // Will clear any events seen
dw1000local.cdata.event = 0;
dw1000local.cdata.dblbuff = dw1000local.dblbuffon ;
@@ -2254,7 +2254,7 @@
// Re-enable the receiver - if auto RX re-enable set
if(dw1000local.sysCFGreg & SYS_CFG_RXAUTR)
{
- dwt_write16bitoffsetreg(SYS_CTRL_ID, 0, (uint16)SYS_CTRL_RXENAB) ;
+ dwt_write16bitoffsetreg(SYS_CTRL_ID, 0, (uint16_t)SYS_CTRL_RXENAB) ;
}
else
{
@@ -2278,7 +2278,7 @@
// Read frame info and other registers and check for overflow again
// If overflow set then discard both frames...
- uint16 len = 0;
+ uint16_t len = 0;
if (status & SYS_STATUS_RXOVRR) // NOTE when overrun both HS and RS pointers point to the same buffer
{
@@ -2291,7 +2291,7 @@
if(dw1000local.sysCFGreg & SYS_CFG_RXAUTR) // Re-enable of RX is ON, then re-enable here (ignore error)
{
- dwt_write16bitoffsetreg(SYS_CTRL_ID, 0, (uint16)SYS_CTRL_RXENAB) ;
+ dwt_write16bitoffsetreg(SYS_CTRL_ID, 0, (uint16_t)SYS_CTRL_RXENAB) ;
}
else // The RX will be re-enabled by the application, report an error
{
@@ -2350,8 +2350,8 @@
}
else // Double buffer
{
- uint8 buff ;
- uint8 hsrb = 0x01 ;
+ uint8_t buff ;
+ uint8_t hsrb = 0x01 ;
// Need to make sure that the host/IC buffer pointers are aligned before starting RX
// Read again because the status could have changed since the interrupt was triggered
@@ -2368,7 +2368,7 @@
if((dw1000local.sysCFGreg & SYS_CFG_RXAUTR) == 0) // Double buffer is on but no auto RX re-enable RX
{
- dwt_write16bitoffsetreg(SYS_CTRL_ID, 0, (uint16)SYS_CTRL_RXENAB) ;
+ dwt_write16bitoffsetreg(SYS_CTRL_ID, 0, (uint16_t)SYS_CTRL_RXENAB) ;
}
// Call the RX call-back function to process the RX event
@@ -2393,7 +2393,7 @@
if(dw1000local.sysCFGreg & SYS_CFG_RXAUTR) // Re-enable of RX is ON, then re-enable here
{
- dwt_write16bitoffsetreg(SYS_CTRL_ID, 0, (uint16)SYS_CTRL_RXENAB) ;
+ dwt_write16bitoffsetreg(SYS_CTRL_ID, 0, (uint16_t)SYS_CTRL_RXENAB) ;
}
}
} // end of else double buffer
@@ -2526,9 +2526,9 @@
*
* no return value
*/
-void dwt_setleds(uint8 test)
+void dwt_setleds(uint8_t test)
{
- uint8 buf[2];
+ uint8_t buf[2];
if(test & 0x1)
{
@@ -2582,7 +2582,7 @@
*/
void _dwt_enableclocks(int clocks)
{
- uint8 reg[2];
+ uint8_t reg[2];
dwt_readfromdevice(PMSC_ID, PMSC_CTRL0_OFFSET, 2, reg);
switch(clocks)
@@ -2675,7 +2675,7 @@
*
* no return value
*/
-void dwt_setdelayedtrxtime(uint32 starttime)
+void dwt_setdelayedtrxtime(uint32_t starttime)
{
dwt_write32bitoffsetreg(DX_TIME_ID, 1, starttime) ;
@@ -2696,25 +2696,25 @@
*
* returns DWT_SUCCESS for success, or DWT_ERROR for error (e.g. a delayed transmission will fail if the delayed time has passed)
*/
-int dwt_starttx(uint8 mode)
+int dwt_starttx(uint8_t mode)
{
int retval = DWT_SUCCESS ;
- uint8 temp = 0x00;
- uint16 checkTxOK = 0 ;
+ uint8_t temp = 0x00;
+ uint16_t checkTxOK = 0 ;
if(mode & DWT_RESPONSE_EXPECTED)
{
- temp = (uint8)SYS_CTRL_WAIT4RESP ; // Set wait4response bit
+ temp = (uint8_t)SYS_CTRL_WAIT4RESP ; // Set wait4response bit
dwt_writetodevice(SYS_CTRL_ID, 0, 1, &temp) ;
dw1000local.wait4resp = 1;
}
if (mode & DWT_START_TX_DELAYED)
{
- //uint32 status ;
+ //uint32_t status ;
// Both SYS_CTRL_TXSTRT and SYS_CTRL_TXDLYS to correctly enable TX
- temp |= (uint8)(SYS_CTRL_TXDLYS | SYS_CTRL_TXSTRT) ;
+ temp |= (uint8_t)(SYS_CTRL_TXDLYS | SYS_CTRL_TXSTRT) ;
dwt_writetodevice(SYS_CTRL_ID, 0, 1, &temp) ;
checkTxOK = dwt_read16bitoffsetreg(SYS_STATUS_ID, 3) ;
//status = dwt_read32bitreg(SYS_STATUS_ID) ; // Read status register
@@ -2727,7 +2727,7 @@
{
// I am taking DSHP set to Indicate that the TXDLYS was set too late for the specified DX_TIME.
// Remedial Action - (a) cancel delayed send
- temp = (uint8)SYS_CTRL_TRXOFF; // This assumes the bit is in the lowest byte
+ temp = (uint8_t)SYS_CTRL_TRXOFF; // This assumes the bit is in the lowest byte
dwt_writetodevice(SYS_CTRL_ID, 0, 1, &temp) ;
// Note event Delayed TX Time too Late
// Could fall through to start a normal send (below) just sending late.....
@@ -2742,7 +2742,7 @@
}
else
{
- temp |= (uint8)SYS_CTRL_TXSTRT ;
+ temp |= (uint8_t)SYS_CTRL_TXSTRT ;
dwt_writetodevice(SYS_CTRL_ID, 0, 1, &temp) ;
}
@@ -2780,10 +2780,10 @@
void dwt_forcetrxoff(void)
{
decaIrqStatus_t stat ;
- uint8 temp ;
- uint32 mask;
+ uint8_t temp ;
+ uint32_t mask;
- temp = (uint8)SYS_CTRL_TRXOFF ; // This assumes the bit is in the lowest byte
+ temp = (uint8_t)SYS_CTRL_TRXOFF ; // This assumes the bit is in the lowest byte
mask = dwt_read32bitreg(SYS_MASK_ID) ; // Read set interrupt mask
@@ -2824,14 +2824,14 @@
*/
void dwt_syncrxbufptrs(void)
{
- uint8 buff ;
+ uint8_t buff ;
// Need to make sure that the host/IC buffer pointers are aligned before starting RX
dwt_readfromdevice(SYS_STATUS_ID, 3, 1, &buff);
if((buff & (SYS_STATUS_ICRBP >> 24)) != // IC side Receive Buffer Pointer
((buff & (SYS_STATUS_HSRBP >> 24)) << 1) ) // Host Side Receive Buffer Pointer
{
- uint8 hsrb = 0x01;
+ uint8_t hsrb = 0x01;
dwt_writetodevice(SYS_CTRL_ID, SYS_CTRL_HRBT_OFFSET , 1, &hsrb) ; // We need to swap RX buffer status reg (write one to toggle internally)
}
}
@@ -2853,9 +2853,9 @@
*
* no return value
*/
-void dwt_setrxmode(int mode, uint8 rxON, uint8 rxOFF)
+void dwt_setrxmode(int mode, uint8_t rxON, uint8_t rxOFF)
{
- uint16 reg16 = RX_SNIFF_MASK & ((rxOFF << 8) | rxON);
+ uint16_t reg16 = RX_SNIFF_MASK & ((rxOFF << 8) | rxON);
if(mode & DWT_RX_SNIFF)
{
@@ -2883,29 +2883,29 @@
*/
int dwt_rxenable(int delayed)
{
- uint16 temp ;
- uint8 temp1 = 0;
+ uint16_t temp ;
+ uint8_t temp1 = 0;
dwt_syncrxbufptrs();
- temp = (uint16)SYS_CTRL_RXENAB ;
+ temp = (uint16_t)SYS_CTRL_RXENAB ;
if (delayed)
{
- temp |= (uint16)SYS_CTRL_RXDLYE ;
+ temp |= (uint16_t)SYS_CTRL_RXDLYE ;
}
dwt_write16bitoffsetreg(SYS_CTRL_ID, 0, temp) ;
if (delayed) // Check for errors
{
- //uint32 status1 = dwt_read32bitreg(SYS_STATUS_ID) ; // Read status register
+ //uint32_t status1 = dwt_read32bitreg(SYS_STATUS_ID) ; // Read status register
dwt_readfromdevice(SYS_STATUS_ID, 3, 1, &temp1) ;
if (temp1 & (SYS_STATUS_HPDWARN >> 24)) // If delay has not passed do delayed else immediate RX on
{
dwt_forcetrxoff(); // Turn the delayed receive off, and do immediate receive, return warning indication
- temp = (uint16)SYS_CTRL_RXENAB; // Clear the delay bit
+ temp = (uint16_t)SYS_CTRL_RXENAB; // Clear the delay bit
dwt_write16bitoffsetreg(SYS_CTRL_ID, 0, temp) ;
return DWT_ERROR;
}
@@ -2928,9 +2928,9 @@
*
* no return value
*/
-void dwt_setrxtimeout(uint16 time)
+void dwt_setrxtimeout(uint16_t time)
{
- uint8 temp ;
+ uint8_t temp ;
dwt_readfromdevice(SYS_CFG_ID, 3, 1, &temp) ; // Read register
@@ -2938,7 +2938,7 @@
{
dwt_write16bitoffsetreg(RX_FWTO_ID, 0x0, time) ;
- temp |= (uint8)(SYS_CFG_RXWTOE >> 24);
+ temp |= (uint8_t)(SYS_CFG_RXWTOE >> 24);
// OR in 32bit value (1 bit set), I know this is in high byte.
dw1000local.sysCFGreg |= SYS_CFG_RXWTOE;
@@ -2946,7 +2946,7 @@
}
else
{
- temp &= ~((uint8)(SYS_CFG_RXWTOE >> 24));
+ temp &= ~((uint8_t)(SYS_CFG_RXWTOE >> 24));
// AND in inverted 32bit value (1 bit clear), I know this is in high byte.
dw1000local.sysCFGreg &= ~(SYS_CFG_RXWTOE);
@@ -2970,7 +2970,7 @@
*
* no return value
*/
-void dwt_setpreambledetecttimeout(uint16 timeout)
+void dwt_setpreambledetecttimeout(uint16_t timeout)
{
dwt_write16bitoffsetreg(DRX_CONF_ID, DRX_PRETOC_OFFSET, timeout);
}
@@ -2999,10 +2999,10 @@
*
* no return value
*/
-void dwt_setinterrupt(uint32 bitmask, uint8 enable)
+void dwt_setinterrupt(uint32_t bitmask, uint8_t enable)
{
decaIrqStatus_t stat ;
- uint32 mask ;
+ uint32_t mask ;
// Need to beware of interrupts occurring in the middle of following read modify write cycle
stat = decamutexon() ;
@@ -3035,14 +3035,14 @@
*/
void dwt_configeventcounters(int enable)
{
- uint8 temp = 0x0; //disable
+ uint8_t temp = 0x0; //disable
// Need to clear and disable, can't just clear
- temp = (uint8)(EVC_CLR); // Clear and disable
+ temp = (uint8_t)(EVC_CLR); // Clear and disable
dwt_writetodevice(DIG_DIAG_ID, EVC_CTRL_OFFSET, 1, &temp) ;
if(enable)
{
- temp = (uint8)(EVC_EN); // Enable
+ temp = (uint8_t)(EVC_EN); // Enable
dwt_writetodevice(DIG_DIAG_ID, EVC_CTRL_OFFSET, 1, &temp) ;
}
}
@@ -3061,7 +3061,7 @@
*/
void dwt_readeventcounters(dwt_deviceentcnts_t *counters)
{
- uint32 temp;
+ uint32_t temp;
temp = dwt_read32bitoffsetreg(DIG_DIAG_ID, EVC_PHE_OFFSET); // Read sync loss (31-16), PHE (15-0)
counters->PHE = temp & 0xFFF;
@@ -3102,7 +3102,7 @@
*/
void dwt_rxreset(void)
{
- uint8 resetrx = 0xe0;
+ uint8_t resetrx = 0xe0;
// Set RX reset
dwt_writetodevice(PMSC_ID, 0x3, 1, &resetrx);
@@ -3123,7 +3123,7 @@
*/
void dwt_softreset(void)
{
- uint8 temp[1] = {0};
+ uint8_t temp[1] = {0};
_dwt_disablesequencing();
//_dwt_enableclocks(FORCE_SYS_XTI); // Set system clock to XTI
@@ -3164,9 +3164,9 @@
*
* no return value
*/
-void dwt_xtaltrim(uint8 value)
+void dwt_xtaltrim(uint8_t value)
{
- uint8 write_buf;
+ uint8_t write_buf;
dwt_readfromdevice(FS_CTRL_ID, FS_XTALT_OFFSET, 1, &write_buf);
@@ -3190,9 +3190,9 @@
*
* returns DWT_SUCCESS for success, or DWT_ERROR for error
*/
-int dwt_configcwmode(uint8 chan)
+int dwt_configcwmode(uint8_t chan)
{
- uint8 write_buf[1];
+ uint8_t write_buf[1];
#ifdef DWT_API_ERROR_CHECK
if ((chan < 1) || (chan > 7) || (6 == chan))
{
@@ -3254,9 +3254,9 @@
*
* no return value
*/
-void dwt_configcontinuousframemode(uint32 framerepetitionrate)
+void dwt_configcontinuousframemode(uint32_t framerepetitionrate)
{
- uint8 write_buf[4];
+ uint8_t write_buf[4];
//
// Disable TX/RX RF block sequencing (needed for continuous frame mode)
@@ -3284,7 +3284,7 @@
//
// Configure continuous frame TX
//
- write_buf[0] = (uint8)(DIAG_TMC_TX_PSTM) ;
+ write_buf[0] = (uint8_t)(DIAG_TMC_TX_PSTM) ;
dwt_writetodevice(DIG_DIAG_ID, DIAG_TMC_OFFSET, 1, write_buf); // Turn the tx power spectrum test mode - continuous sending of frames
}
@@ -3309,11 +3309,11 @@
*
* returns (temp_raw<<8)|(vbat_raw)
*/
-uint16 dwt_readtempvbat(uint8 fastSPI)
+uint16_t dwt_readtempvbat(uint8_t fastSPI)
{
- uint8 wr_buf[2];
- uint8 vbat_raw;
- uint8 temp_raw;
+ uint8_t wr_buf[2];
+ uint8_t vbat_raw;
+ uint8_t temp_raw;
// These writes should be single writes and in sequence
wr_buf[0] = 0x80; // Enable TLD Bias
@@ -3368,9 +3368,9 @@
*
* returns: 8-bit raw temperature sensor value
*/
-uint8 dwt_readwakeuptemp(void)
+uint8_t dwt_readwakeuptemp(void)
{
- uint8 temp_raw;
+ uint8_t temp_raw;
dwt_readfromdevice(TX_CAL_ID, TC_SARL_SAR_LTEMP_OFFSET, 1, &temp_raw);
return (temp_raw);
}
@@ -3388,9 +3388,9 @@
*
* returns: 8-bit raw battery voltage sensor value
*/
-uint8 dwt_readwakeupvbat(void)
+uint8_t dwt_readwakeupvbat(void)
{
- uint8 vbat_raw;
+ uint8_t vbat_raw;
dwt_readfromdevice(TX_CAL_ID, TC_SARL_SAR_LVBAT_OFFSET, 1, &vbat_raw);
return (vbat_raw);
}
diff --git "a/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/decadriver/deca_device_api.h" "b/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/decadriver/deca_device_api.h"
index 032fbbd..07ba533 100644
--- "a/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/decadriver/deca_device_api.h"
+++ "b/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/decadriver/deca_device_api.h"
@@ -13,51 +13,10 @@
#ifndef _DECA_DEVICE_API_H_
#define _DECA_DEVICE_API_H_
+#include <stdint.h>
+
#ifdef __cplusplus
extern "C" {
-#endif
-
-
-#ifndef uint8
-#ifndef _DECA_UINT8_
-#define _DECA_UINT8_
-typedef unsigned char uint8;
-#endif
-#endif
-
-#ifndef uint16
-#ifndef _DECA_UINT16_
-#define _DECA_UINT16_
-typedef unsigned short uint16;
-#endif
-#endif
-
-#ifndef uint32
-#ifndef _DECA_UINT32_
-#define _DECA_UINT32_
-typedef unsigned long uint32;
-#endif
-#endif
-
-#ifndef int8
-#ifndef _DECA_INT8_
-#define _DECA_INT8_
-typedef signed char int8;
-#endif
-#endif
-
-#ifndef int16
-#ifndef _DECA_INT16_
-#define _DECA_INT16_
-typedef signed short int16;
-#endif
-#endif
-
-#ifndef int32
-#ifndef _DECA_INT32_
-#define _DECA_INT32_
-typedef signed long int32;
-#endif
#endif
#define DWT_SUCCESS (0)
@@ -170,12 +129,12 @@
typedef struct
{
- uint32 status; //initial value of register as ISR is entered
- uint8 event; //event type
- uint8 aatset; //auto ACK TX bit is set
- uint16 datalength; //length of frame
- uint8 fctrl[2]; //frame control bytes
- uint8 dblbuff ; //set if double buffer is enabled
+ uint32_t status; //initial value of register as ISR is entered
+ uint8_t event; //event type
+ uint8_t aatset; //auto ACK TX bit is set
+ uint16_t datalength; //length of frame
+ uint8_t fctrl[2]; //frame control bytes
+ uint8_t dblbuff ; //set if double buffer is enabled
} dwt_callback_data_t;
@@ -201,29 +160,29 @@
#pragma pack(1)
typedef struct
{
- uint8 chan ; //!< channel number {1, 2, 3, 4, 5, 7 }
- uint8 prf ; //!< Pulse Repetition Frequency {DWT_PRF_16M or DWT_PRF_64M}
- uint8 txPreambLength ; //!< DWT_PLEN_64..DWT_PLEN_4096
- uint8 rxPAC ; //!< Acquisition Chunk Size (Relates to RX preamble length)
- uint8 txCode ; //!< TX preamble code
- uint8 rxCode ; //!< RX preamble code
- uint8 nsSFD ; //!< Boolean should we use non-standard SFD for better performance
- uint8 dataRate ; //!< Data Rate {DWT_BR_110K, DWT_BR_850K or DWT_BR_6M8}
- uint8 phrMode ; //!< PHR mode {0x0 - standard DWT_PHRMODE_STD, 0x3 - extended frames DWT_PHRMODE_EXT}
- uint16 sfdTO ; //!< SFD timeout value (in symbols)
+ uint8_t chan ; //!< channel number {1, 2, 3, 4, 5, 7 }
+ uint8_t prf ; //!< Pulse Repetition Frequency {DWT_PRF_16M or DWT_PRF_64M}
+ uint8_t txPreambLength ; //!< DWT_PLEN_64..DWT_PLEN_4096
+ uint8_t rxPAC ; //!< Acquisition Chunk Size (Relates to RX preamble length)
+ uint8_t txCode ; //!< TX preamble code
+ uint8_t rxCode ; //!< RX preamble code
+ uint8_t nsSFD ; //!< Boolean should we use non-standard SFD for better performance
+ uint8_t dataRate ; //!< Data Rate {DWT_BR_110K, DWT_BR_850K or DWT_BR_6M8}
+ uint8_t phrMode ; //!< PHR mode {0x0 - standard DWT_PHRMODE_STD, 0x3 - extended frames DWT_PHRMODE_EXT}
+ uint16_t sfdTO ; //!< SFD timeout value (in symbols)
} __attribute__ ((packed)) dwt_config_t ;
#pragma pack()
typedef struct
{
- uint8 PGdly;
+ uint8_t PGdly;
//TX POWER
//31:24 BOOST_0.125ms_PWR
//23:16 BOOST_0.25ms_PWR-TX_SHR_PWR
//15:8 BOOST_0.5ms_PWR-TX_PHR_PWR
//7:0 DEFAULT_PWR-TX_DATA_PWR
- uint32 power;
+ uint32_t power;
}
dwt_txconfig_t ;
@@ -231,34 +190,34 @@
typedef struct
{
- uint16 maxNoise ; // LDE max value of noise
- uint16 firstPathAmp1 ; // Amplitude at floor(index FP) + 1
- uint16 stdNoise ; // Standard deviation of noise
- uint16 firstPathAmp2 ; // Amplitude at floor(index FP) + 2
- uint16 firstPathAmp3 ; // Amplitude at floor(index FP) + 3
- uint16 maxGrowthCIR ; // Channel Impulse Response max growth CIR
- uint16 rxPreamCount ; // Count of preamble symbols accumulated
- //uint32 debug1;
- //uint32 debug2;
- uint16 firstPath ; // First path index (10.6 bits fixed point integer)
+ uint16_t maxNoise ; // LDE max value of noise
+ uint16_t firstPathAmp1 ; // Amplitude at floor(index FP) + 1
+ uint16_t stdNoise ; // Standard deviation of noise
+ uint16_t firstPathAmp2 ; // Amplitude at floor(index FP) + 2
+ uint16_t firstPathAmp3 ; // Amplitude at floor(index FP) + 3
+ uint16_t maxGrowthCIR ; // Channel Impulse Response max growth CIR
+ uint16_t rxPreamCount ; // Count of preamble symbols accumulated
+ //uint32_t debug1;
+ //uint32_t debug2;
+ uint16_t firstPath ; // First path index (10.6 bits fixed point integer)
} dwt_rxdiag_t ;
typedef struct
{
//all of the below are mapped to a 12-bit register in DW1000
- uint16 PHE ; //number of received header errors
- uint16 RSL ; //number of received frame sync loss events
- uint16 CRCG ; //number of good CRC received frames
- uint16 CRCB ; //number of bad CRC (CRC error) received frames
- uint16 ARFE ; //number of address filter errors
- uint16 OVER ; //number of receiver overflows (used in double buffer mode)
- uint16 SFDTO ; //SFD timeouts
- uint16 PTO ; //Preamble timeouts
- uint16 RTO ; //RX frame wait timeouts
- uint16 TXF ; //number of transmitted frames
- uint16 HPW ; //half period warn
- uint16 TXW ; //power up warn
+ uint16_t PHE ; //number of received header errors
+ uint16_t RSL ; //number of received frame sync loss events
+ uint16_t CRCG ; //number of good CRC received frames
+ uint16_t CRCB ; //number of bad CRC (CRC error) received frames
+ uint16_t ARFE ; //number of address filter errors
+ uint16_t OVER ; //number of receiver overflows (used in double buffer mode)
+ uint16_t SFDTO ; //SFD timeouts
+ uint16_t PTO ; //Preamble timeouts
+ uint16_t RTO ; //RX frame wait timeouts
+ uint16_t TXF ; //number of transmitted frames
+ uint16_t HPW ; //half period warn
+ uint16_t TXW ; //power up warn
} dwt_deviceentcnts_t ;
@@ -274,7 +233,7 @@
*
* returns the 32 bit part ID value as programmed in the factory
*/
-uint32 dwt_getpartid(void);
+uint32_t dwt_getpartid(void);
/*! ------------------------------------------------------------------------------------------------------------------
* @fn dwt_getlotid()
@@ -287,7 +246,7 @@
*
* returns the 32 bit lot ID value as programmed in the factory
*/
-uint32 dwt_getlotid(void);
+uint32_t dwt_getlotid(void);
/*! ------------------------------------------------------------------------------------------------------------------
* @fn dwt_readdevid()
@@ -300,7 +259,7 @@
*
* returns the read value which for DW1000 is 0xDECA0130
*/
-uint32 dwt_readdevid(void);
+uint32_t dwt_readdevid(void);
/*! ------------------------------------------------------------------------------------------------------------------
* @fn dwt_otprevision()
@@ -313,7 +272,7 @@
*
* returns the read OTP revision value
*/
-uint8 dwt_otprevision(void);
+uint8_t dwt_otprevision(void);
/*! ------------------------------------------------------------------------------------------------------------------
* @fn dwt_setGPIOforEXTTRX()
@@ -341,7 +300,7 @@
*
* no return value
*/
-void dwt_setGPIOdirection(uint32 gpioNum, uint32 direction);
+void dwt_setGPIOdirection(uint32_t gpioNum, uint32_t direction);
/*! ------------------------------------------------------------------------------------------------------------------
* @fn dwt_setGPIOvalue()
@@ -356,7 +315,7 @@
*
* no return value
*/
-void dwt_setGPIOvalue(uint32 gpioNum, uint32 value);
+void dwt_setGPIOvalue(uint32_t gpioNum, uint32_t value);
/*! ------------------------------------------------------------------------------------------------------------------
* @fn dwt_initialise()
@@ -380,7 +339,7 @@
*
* returns DWT_SUCCESS for success, or DWT_ERROR for error
*/
-int dwt_initialise(uint16 config) ;
+int dwt_initialise(uint16_t config) ;
/*! ------------------------------------------------------------------------------------------------------------------
* @fn dwt_configure()
@@ -428,7 +387,7 @@
*
* no return value
*/
-void dwt_setrxantennadelay(uint16 antennaDly);
+void dwt_setrxantennadelay(uint16_t antennaDly);
/*! ------------------------------------------------------------------------------------------------------------------
* @fn dwt_settxantennadelay()
@@ -443,7 +402,7 @@
*
* no return value
*/
-void dwt_settxantennadelay(uint16 antennaDly);
+void dwt_settxantennadelay(uint16_t antennaDly);
/*! ------------------------------------------------------------------------------------------------------------------
* @fn dwt_setsmarttxpower()
@@ -479,7 +438,7 @@
*
* returns DWT_SUCCESS for success, or DWT_ERROR for error
*/
-int dwt_writetxdata(uint16 txFrameLength, uint8 *txFrameBytes, uint16 txBufferOffset) ;
+int dwt_writetxdata(uint16_t txFrameLength, uint8_t *txFrameBytes, uint16_t txBufferOffset) ;
/*! ------------------------------------------------------------------------------------------------------------------
* @fn dwt_writetxfctrl()
@@ -497,7 +456,7 @@
*
* returns DWT_SUCCESS for success, or DWT_ERROR for error
*/
-int dwt_writetxfctrl(uint16 txFrameLength, uint16 txBufferOffset) ;
+int dwt_writetxfctrl(uint16_t txFrameLength, uint16_t txBufferOffset) ;
/*! ------------------------------------------------------------------------------------------------------------------
* @fn dwt_starttx()
@@ -514,7 +473,7 @@
*
* returns DWT_SUCCESS for success, or DWT_ERROR for error (e.g. a delayed transmission will fail if the delayed time has passed)
*/
-int dwt_starttx(uint8 mode) ;
+int dwt_starttx(uint8_t mode) ;
/*! ------------------------------------------------------------------------------------------------------------------
* @fn dwt_setdelayedtrxtime()
@@ -529,7 +488,7 @@
*
* no return value
*/
-void dwt_setdelayedtrxtime(uint32 starttime) ;
+void dwt_setdelayedtrxtime(uint32_t starttime) ;
/*! ------------------------------------------------------------------------------------------------------------------
* @fn dwt_readtxtimestamp()
@@ -543,7 +502,7 @@
*
* no return value
*/
-void dwt_readtxtimestamp(uint8 *timestamp);
+void dwt_readtxtimestamp(uint8_t *timestamp);
/*! ------------------------------------------------------------------------------------------------------------------
* @fn dwt_readtxtimestamphi32()
@@ -556,7 +515,7 @@
*
* returns high 32-bits of TX timestamp
*/
-uint32 dwt_readtxtimestamphi32(void);
+uint32_t dwt_readtxtimestamphi32(void);
/*! ------------------------------------------------------------------------------------------------------------------
* @fn dwt_readtxtimestamplo32()
@@ -569,7 +528,7 @@
*
* returns low 32-bits of TX timestamp
*/
-uint32 dwt_readtxtimestamplo32(void);
+uint32_t dwt_readtxtimestamplo32(void);
/*! ------------------------------------------------------------------------------------------------------------------
* @fn dwt_readrxtimestamp()
@@ -583,7 +542,7 @@
*
* no return value
*/
-void dwt_readrxtimestamp(uint8 *timestamp);
+void dwt_readrxtimestamp(uint8_t *timestamp);
/*! ------------------------------------------------------------------------------------------------------------------
* @fn dwt_readrxtimestamphi32()
@@ -596,7 +555,7 @@
*
* returns high 32-bits of RX timestamp
*/
-uint32 dwt_readrxtimestamphi32(void);
+uint32_t dwt_readrxtimestamphi32(void);
/*! ------------------------------------------------------------------------------------------------------------------
* @fn dwt_readrxtimestamplo32()
@@ -609,7 +568,7 @@
*
* returns low 32-bits of RX timestamp
*/
-uint32 dwt_readrxtimestamplo32(void);
+uint32_t dwt_readrxtimestamplo32(void);
/*! ------------------------------------------------------------------------------------------------------------------
* @fn dwt_readsystimestamphi32()
@@ -622,7 +581,7 @@
*
* returns high 32-bits of system time timestamp
*/
-uint32 dwt_readsystimestamphi32(void);
+uint32_t dwt_readsystimestamphi32(void);
/*! ------------------------------------------------------------------------------------------------------------------
* @fn dwt_readsystime()
@@ -637,7 +596,7 @@
*
* no return value
*/
-void dwt_readsystime(uint8 *timestamp);
+void dwt_readsystime(uint8_t *timestamp);
/*! ------------------------------------------------------------------------------------------------------------------
* @fn dwt_checkoverrun()
@@ -714,7 +673,7 @@
#define DWT_RX_NORMAL (0x0)
#define DWT_RX_SNIFF (0x1)
-void dwt_setrxmode(int mode, uint8 rxON, uint8 rxOFF);
+void dwt_setrxmode(int mode, uint8_t rxON, uint8_t rxOFF);
/*! ------------------------------------------------------------------------------------------------------------------
* @fn dwt_setautorxreenable()
@@ -758,7 +717,7 @@
*
* no return value
*/
-void dwt_setrxtimeout(uint16 time);
+void dwt_setrxtimeout(uint16_t time);
/*! ------------------------------------------------------------------------------------------------------------------
* @fn dwt_setpreambledetecttimeout()
@@ -772,7 +731,7 @@
*
* no return value
*/
-void dwt_setpreambledetecttimeout(uint16 timeout);
+void dwt_setpreambledetecttimeout(uint16_t timeout);
/*! ------------------------------------------------------------------------------------------------------------------
@@ -788,7 +747,7 @@
*
* returns the number of XTAL/2 cycles per low-power oscillator cycle. LP OSC frequency = 19.2 MHz/return value
*/
-uint16 dwt_calibratesleepcnt(void);
+uint16_t dwt_calibratesleepcnt(void);
/*! ------------------------------------------------------------------------------------------------------------------
* @fn dwt_configuresleepcnt()
@@ -804,7 +763,7 @@
*
* no return value
*/
-void dwt_configuresleepcnt(uint16 sleepcnt);
+void dwt_configuresleepcnt(uint16_t sleepcnt);
/*! ------------------------------------------------------------------------------------------------------------------
* @fn dwt_configuresleep()
@@ -839,7 +798,7 @@
*
* no return value
*/
-void dwt_configuresleep(uint16 mode, uint8 wake);
+void dwt_configuresleep(uint16_t mode, uint8_t wake);
/*! ------------------------------------------------------------------------------------------------------------------
* @fn dwt_entersleep()
@@ -896,7 +855,7 @@
*
* returns DWT_SUCCESS for success, or DWT_ERROR for error
*/
-int dwt_spicswakeup(uint8 *buff, uint16 length);
+int dwt_spicswakeup(uint8_t *buff, uint16_t length);
/*! ------------------------------------------------------------------------------------------------------------------
* @fn dwt_setcallbacks()
@@ -924,7 +883,7 @@
*
* return value is 1 if the IRQS bit is set and 0 otherwise
*/
-uint8 dwt_checkIRQ(void);
+uint8_t dwt_checkIRQ(void);
/*! ------------------------------------------------------------------------------------------------------------------
* @fn dwt_isr()
@@ -968,7 +927,7 @@
*
* no return value
*/
-void dwt_setinterrupt( uint32 bitmask, uint8 enable);
+void dwt_setinterrupt( uint32_t bitmask, uint8_t enable);
/*! ------------------------------------------------------------------------------------------------------------------
* @fn dwt_setpanid()
@@ -982,7 +941,7 @@
*
* no return value
*/
-void dwt_setpanid(uint16 panID);
+void dwt_setpanid(uint16_t panID);
/*! ------------------------------------------------------------------------------------------------------------------
* @fn dwt_setaddress16()
@@ -996,7 +955,7 @@
*
* no return value
*/
-void dwt_setaddress16(uint16 shortAddress);
+void dwt_setaddress16(uint16_t shortAddress);
/*! ------------------------------------------------------------------------------------------------------------------
* @fn dwt_seteui()
@@ -1010,7 +969,7 @@
*
* no return value
*/
-void dwt_seteui(uint8 *eui64);
+void dwt_seteui(uint8_t *eui64);
/*! ------------------------------------------------------------------------------------------------------------------
* @fn dwt_geteui()
@@ -1024,7 +983,7 @@
*
* no return value
*/
-void dwt_geteui(uint8 *eui64);
+void dwt_geteui(uint8_t *eui64);
/*! ------------------------------------------------------------------------------------------------------------------
* @fn dwt_otpread()
@@ -1040,7 +999,7 @@
*
* no return value
*/
-void dwt_otpread(uint32 address, uint32 *array, uint8 length);
+void dwt_otpread(uint32_t address, uint32_t *array, uint8_t length);
/*! ------------------------------------------------------------------------------------------------------------------
* @fn dwt_enableframefilter()
@@ -1062,7 +1021,7 @@
*
* no return value
*/
-void dwt_enableframefilter(uint16 bitmask);
+void dwt_enableframefilter(uint16_t bitmask);
/*! ------------------------------------------------------------------------------------------------------------------
* @fn dwt_enableautoack()
@@ -1078,7 +1037,7 @@
*
* no return value
*/
-void dwt_enableautoack(uint8 responseDelayTime);
+void dwt_enableautoack(uint8_t responseDelayTime);
/*! ------------------------------------------------------------------------------------------------------------------
* @fn dwt_setrxaftertxdelay()
@@ -1092,7 +1051,7 @@
*
* no return value
*/
-void dwt_setrxaftertxdelay(uint32 rxDelayTime);
+void dwt_setrxaftertxdelay(uint32_t rxDelayTime);
/*! ------------------------------------------------------------------------------------------------------------------
* @fn dwt_rxreset()
@@ -1134,7 +1093,7 @@
*
* no return value
*/
-void dwt_readrxdata(uint8 *buffer, uint16 length, uint16 rxBufferOffset);
+void dwt_readrxdata(uint8_t *buffer, uint16_t length, uint16_t rxBufferOffset);
/*! ------------------------------------------------------------------------------------------------------------------
* @fn dwt_readaccdata()
@@ -1150,7 +1109,7 @@
*
* no return value
*/
-void dwt_readaccdata(uint8 *buffer, uint16 length, uint16 rxBufferOffset);
+void dwt_readaccdata(uint8_t *buffer, uint16_t length, uint16_t rxBufferOffset);
/*! ------------------------------------------------------------------------------------------------------------------
* @fn dwt_readdiagnostics()
@@ -1181,7 +1140,7 @@
*
* no return value
*/
-void dwt_loadopsettabfromotp(uint8 gtab_sel);
+void dwt_loadopsettabfromotp(uint8_t gtab_sel);
/*! ------------------------------------------------------------------------------------------------------------------
* @fn dwt_configeventcounters()
@@ -1223,7 +1182,7 @@
*
* returns DWT_SUCCESS for success, or DWT_ERROR for error
*/
-uint32 dwt_otpwriteandverify(uint32 value, uint16 address);
+uint32_t dwt_otpwriteandverify(uint32_t value, uint16_t address);
/*! ------------------------------------------------------------------------------------------------------------------
* @fn dwt_setleds()
@@ -1240,7 +1199,7 @@
*
* no return value
*/
-void dwt_setleds(uint8 test);
+void dwt_setleds(uint8_t test);
/*! ------------------------------------------------------------------------------------------------------------------
* @fn dwt_xtaltrim()
@@ -1254,7 +1213,7 @@
*
* no return value
*/
-void dwt_xtaltrim(uint8 value);
+void dwt_xtaltrim(uint8_t value);
/*! ------------------------------------------------------------------------------------------------------------------
* @fn dwt_configcwmode()
@@ -1268,7 +1227,7 @@
*
* returns DWT_SUCCESS for success, or DWT_ERROR for error
*/
-int dwt_configcwmode(uint8 chan);
+int dwt_configcwmode(uint8_t chan);
/*! ------------------------------------------------------------------------------------------------------------------
* @fn dwt_configcontinuousframemode()
@@ -1283,7 +1242,7 @@
*
* no return value
*/
-void dwt_configcontinuousframemode(uint32 framerepetitionrate);
+void dwt_configcontinuousframemode(uint32_t framerepetitionrate);
/*! ------------------------------------------------------------------------------------------------------------------
* @fn dwt_readtempvbat()
@@ -1306,7 +1265,7 @@
*
* returns (temp_raw<<8)|(vbat_raw)
*/
-uint16 dwt_readtempvbat(uint8 fastSPI);
+uint16_t dwt_readtempvbat(uint8_t fastSPI);
/*! ------------------------------------------------------------------------------------------------------------------
* @fn dwt_readwakeuptemp()
@@ -1321,7 +1280,7 @@
*
* returns: 8-bit raw temperature sensor value
*/
-uint8 dwt_readwakeuptemp(void) ;
+uint8_t dwt_readwakeuptemp(void) ;
/*! ------------------------------------------------------------------------------------------------------------------
* @fn dwt_readwakeupvbat()
@@ -1336,7 +1295,7 @@
*
* returns: 8-bit raw battery voltage sensor value
*/
-uint8 dwt_readwakeupvbat(void) ;
+uint8_t dwt_readwakeupvbat(void) ;
/*! ------------------------------------------------------------------------------------------------------------------
* @fn dwt_writetodevice()
@@ -1363,10 +1322,10 @@
*/
int dwt_writetodevice // returns 0 for success, or, -1 for error.
(
- uint16 recordNumber, // input parameter - ID of register file or buffer being accessed
- uint16 index, // input parameter - byte index into register file or buffer being accessed
- uint32 length, // input parameter - number of bytes being written
- const uint8 *buffer // input parameter - pointer to buffer containing the 'length' bytes to be written
+ uint16_t recordNumber, // input parameter - ID of register file or buffer being accessed
+ uint16_t index, // input parameter - byte index into register file or buffer being accessed
+ uint32_t length, // input parameter - number of bytes being written
+ const uint8_t *buffer // input parameter - pointer to buffer containing the 'length' bytes to be written
) ;
/*! ------------------------------------------------------------------------------------------------------------------
@@ -1394,10 +1353,10 @@
*/
int dwt_readfromdevice // returns offset where requested data begins in supplied buffer, or, -1 for error.
(
- uint16 recordNumber, // input parameter - ID of register file or buffer being accessed
- uint16 index, // input parameter - byte index into register file or buffer being accessed
- uint32 length, // input parameter - number of bytes being read
- uint8 *buffer // input parameter - pointer to buffer in which to return the read data.
+ uint16_t recordNumber, // input parameter - ID of register file or buffer being accessed
+ uint16_t index, // input parameter - byte index into register file or buffer being accessed
+ uint32_t length, // input parameter - number of bytes being read
+ uint8_t *buffer // input parameter - pointer to buffer in which to return the read data.
) ;
/*! ------------------------------------------------------------------------------------------------------------------
@@ -1413,7 +1372,7 @@
*
* returns 32 bit register value (success), or DWT_ERROR for error
*/
-uint32 dwt_read32bitoffsetreg(int regFileID, int regOffset) ;
+uint32_t dwt_read32bitoffsetreg(int regFileID, int regOffset) ;
/*! ------------------------------------------------------------------------------------------------------------------
* @fn dwt_write32bitoffsetreg()
@@ -1429,7 +1388,7 @@
*
* returns DWT_SUCCESS for success, or DWT_ERROR for error
*/
-int dwt_write32bitoffsetreg(int regFileID, int regOffset, uint32 regval);
+int dwt_write32bitoffsetreg(int regFileID, int regOffset, uint32_t regval);
/*! ------------------------------------------------------------------------------------------------------------------
* @fn dwt_read16bitoffsetreg()
@@ -1444,7 +1403,7 @@
*
* returns 16 bit register value (success), or DWT_ERROR for error
*/
-uint16 dwt_read16bitoffsetreg(int regFileID, int regOffset);
+uint16_t dwt_read16bitoffsetreg(int regFileID, int regOffset);
/*! ------------------------------------------------------------------------------------------------------------------
* @fn dwt_write16bitoffsetreg()
@@ -1460,7 +1419,7 @@
*
* returns DWT_SUCCESS for success, or DWT_ERROR for error
*/
-int dwt_write16bitoffsetreg(int regFileID, int regOffset, uint16 regval) ;
+int dwt_write16bitoffsetreg(int regFileID, int regOffset, uint16_t regval) ;
#define dwt_write32bitreg(x,y) dwt_write32bitoffsetreg(x,0,y)
#define dwt_read32bitreg(x) dwt_read32bitoffsetreg(x,0)
@@ -1489,10 +1448,10 @@
*/
extern int writetospi // returns 0 for success, or, -1 for error.
(
- uint16 headerLength, // input parameter - number of bytes header being written
- const uint8 *headerBuffer, // input parameter - pointer to buffer containing the 'headerLength' bytes of header to be written
- uint32 bodylength, // input parameter - number of bytes data being written
- const uint8 *bodyBuffer // input parameter - pointer to buffer containing the 'bodylength' bytes od data to be written
+ uint16_t headerLength, // input parameter - number of bytes header being written
+ const uint8_t *headerBuffer, // input parameter - pointer to buffer containing the 'headerLength' bytes of header to be written
+ uint32_t bodylength, // input parameter - number of bytes data being written
+ const uint8_t *bodyBuffer // input parameter - pointer to buffer containing the 'bodylength' bytes od data to be written
) ;
/*! ------------------------------------------------------------------------------------------------------------------
@@ -1519,10 +1478,10 @@
*/
extern int readfromspi // returns offset where requested data begins in supplied buffer, or, -1 for error.
(
- uint16 headerLength, // input parameter - number of bytes header to write
- const uint8 *headerBuffer, // input parameter - pointer to buffer containing the 'headerLength' bytes of header to write
- uint32 readlength, // input parameter - number of bytes data being read
- uint8 *readBuffer // input parameter - pointer to buffer containing to return the data (NB: size required = headerLength + readlength)
+ uint16_t headerLength, // input parameter - number of bytes header to write
+ const uint8_t *headerBuffer, // input parameter - pointer to buffer containing the 'headerLength' bytes of header to write
+ uint32_t readlength, // input parameter - number of bytes data being read
+ uint8_t *readBuffer // input parameter - pointer to buffer containing to return the data (NB: size required = headerLength + readlength)
) ;
/*! ------------------------------------------------------------------------------------------------------------------
@@ -1539,7 +1498,7 @@
*
* returns correction needed in meters
*/
-double dwt_getrangebias(uint8 chan, float range, uint8 prf);
+double dwt_getrangebias(uint8_t chan, float range, uint8_t prf);
// ---------------------------------------------------------------------------
diff --git "a/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/decadriver/deca_param_types.h" "b/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/decadriver/deca_param_types.h"
index d923f67..d8e17fc 100644
--- "a/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/decadriver/deca_param_types.h"
+++ "b/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/decadriver/deca_param_types.h"
@@ -12,10 +12,11 @@
#ifndef _DECA_PARAM_TYPES_H_
#define _DECA_PARAM_TYPES_H_
+#include <stdint.h>
+
#ifdef __cplusplus
extern "C" {
#endif
-#include "deca_types.h"
#define NUM_BR 3
#define NUM_PRF 2
@@ -29,25 +30,25 @@
typedef struct
{
- uint32 lo32;
- uint16 target[NUM_PRF];
+ uint32_t lo32;
+ uint16_t target[NUM_PRF];
} agc_cfg_struct ;
extern const agc_cfg_struct agc_config ;
//SFD threshold settings for 110k, 850k, 6.8Mb standard and non-standard
-extern const uint16 sftsh[NUM_BR][NUM_SFD];
+extern const uint16_t sftsh[NUM_BR][NUM_SFD];
-extern const uint16 dtune1[NUM_PRF];
+extern const uint16_t dtune1[NUM_PRF];
#define XMLPARAMS_VERSION (1.17f)
-extern const uint8 pll2_config[NUM_CH][5];
-extern const uint8 rx_config[NUM_BW];
-extern const uint32 tx_config[NUM_CH];
-extern const uint8 dwnsSFDlen[NUM_BR]; //length of SFD for each of the bitrates
-extern const uint32 digital_bb_config[NUM_PRF][NUM_PACS];
-extern const uint8 chan_idx[NUM_CH_SUPPORTED];
+extern const uint8_t pll2_config[NUM_CH][5];
+extern const uint8_t rx_config[NUM_BW];
+extern const uint32_t tx_config[NUM_CH];
+extern const uint8_t dwnsSFDlen[NUM_BR]; //length of SFD for each of the bitrates
+extern const uint32_t digital_bb_config[NUM_PRF][NUM_PACS];
+extern const uint8_t chan_idx[NUM_CH_SUPPORTED];
#define PEAK_MULTPLIER (0x60) //3 -> (0x3 * 32) & 0x00E0
#define N_STD_FACTOR (13)
@@ -56,7 +57,7 @@
#define LDE_PARAM3_16 (0x1607)
#define LDE_PARAM3_64 (0x0607)
-extern const uint16 lde_replicaCoeff[PCODES];
+extern const uint16_t lde_replicaCoeff[PCODES];
#ifdef __cplusplus
}
diff --git "a/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/decadriver/deca_params_init.c" "b/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/decadriver/deca_params_init.c"
index 0e6603d..244b29a 100644
--- "a/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/decadriver/deca_params_init.c"
+++ "b/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/decadriver/deca_params_init.c"
@@ -22,10 +22,10 @@
//-----------------------------------------
// map the channel number to the index in the configuration arrays below
// 0th element is chan 1, 1st is chan 2, 2nd is chan 3, 3rd is chan 4, 4th is chan 5, 5th is chan 7
-const uint8 chan_idx[NUM_CH_SUPPORTED] = {0, 0, 1, 2, 3, 4, 0, 5};
+const uint8_t chan_idx[NUM_CH_SUPPORTED] = {0, 0, 1, 2, 3, 4, 0, 5};
//-----------------------------------------
-const uint32 tx_config[NUM_CH] =
+const uint32_t tx_config[NUM_CH] =
{
RF_TXCTRL_CH1, /* Tx value match UM */
RF_TXCTRL_CH2,
@@ -36,7 +36,7 @@
};
//RF -> Channel_Specific_Cfg -> Channel_Cfg -> RF_PLL -> RF PLL2
-const uint8 pll2_config[NUM_CH][5] =
+const uint8_t pll2_config[NUM_CH][5] =
{
{ 0x07, 0x04, 0x00, 0x09, 0x1E}, //3.5Ghz
@@ -53,7 +53,7 @@
//bandwidth configuration
-const uint8 rx_config[NUM_BW] =
+const uint8_t rx_config[NUM_BW] =
{
0xD8, //NBW
0xBC //WBW
@@ -68,10 +68,10 @@
};
-const uint8 dwnsSFDlen[NUM_BR] = { 0x40, 0x10, 0x08 }; //DW non-standard SFD length for 110k, 850k and 6.81M
+const uint8_t dwnsSFDlen[NUM_BR] = { 0x40, 0x10, 0x08 }; //DW non-standard SFD length for 110k, 850k and 6.81M
// SFD Threshold
-const uint16 sftsh[NUM_BR][NUM_SFD] =
+const uint16_t sftsh[NUM_BR][NUM_SFD] =
{
//110k
{
@@ -90,13 +90,13 @@
}
};
-const uint16 dtune1[NUM_PRF] =
+const uint16_t dtune1[NUM_PRF] =
{
0x0087, // 16 MHz PRF
0x008D // 64 MHz PRF
};
-const uint32 digital_bb_config[NUM_PRF][NUM_PACS] =
+const uint32_t digital_bb_config[NUM_PRF][NUM_PACS] =
{
//16 PRF
{
@@ -122,7 +122,7 @@
}
};
-const uint16 lde_replicaCoeff[PCODES] =
+const uint16_t lde_replicaCoeff[PCODES] =
{
// 0
diff --git "a/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/decadriver/deca_range_tables.c" "b/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/decadriver/deca_range_tables.c"
index e230d1d..8392a6f 100644
--- "a/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/decadriver/deca_range_tables.c"
+++ "b/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/decadriver/deca_range_tables.c"
@@ -20,8 +20,8 @@
#define NUM_64M_OFFSET (26)
#define NUM_64M_OFFSETWB (59)
-const uint8 chan_idxnb[NUM_CH_SUPPORTED] = {0, 0, 1, 2, 0, 3, 0, 0}; // Only channels 1,2,3 and 5 are in the narrow band tables
-const uint8 chan_idxwb[NUM_CH_SUPPORTED] = {0, 0, 0, 0, 0, 0, 0, 1}; // Only channels 4 and 7 are in in the wide band tables
+const uint8_t chan_idxnb[NUM_CH_SUPPORTED] = {0, 0, 1, 2, 0, 3, 0, 0}; // Only channels 1,2,3 and 5 are in the narrow band tables
+const uint8_t chan_idxwb[NUM_CH_SUPPORTED] = {0, 0, 0, 0, 0, 0, 0, 1}; // Only channels 4 and 7 are in in the wide band tables
//---------------------------------------------------------------------------------------------------------------------------
// Range Bias Correction TABLES of range values in integer units of 25 CM, for 8-bit unsigned storage, MUST END IN 255 !!!!!!
@@ -39,7 +39,7 @@
// range25cm16PRFnb: Range Bias Correction table for narrow band channels at 16 MHz PRF, NB: !!!! each MUST END IN 255 !!!!
//---------------------------------------------------------------------------------------------------------------------------
-const uint8 range25cm16PRFnb[4][NUM_16M_OFFSET] =
+const uint8_t range25cm16PRFnb[4][NUM_16M_OFFSET] =
{
// Ch 1 - range25cm16PRFnb
{
@@ -211,7 +211,7 @@
// range25cm16PRFwb: Range Bias Correction table for wide band channels at 16 MHz PRF, NB: !!!! each MUST END IN 255 !!!!
//---------------------------------------------------------------------------------------------------------------------------
-const uint8 range25cm16PRFwb[2][NUM_16M_OFFSETWB] =
+const uint8_t range25cm16PRFwb[2][NUM_16M_OFFSETWB] =
{
// Ch 4 - range25cm16PRFwb
{
@@ -362,7 +362,7 @@
// range25cm64PRFnb: Range Bias Correction table for narrow band channels at 64 MHz PRF, NB: !!!! each MUST END IN 255 !!!!
//---------------------------------------------------------------------------------------------------------------------------
-const uint8 range25cm64PRFnb[4][NUM_64M_OFFSET] =
+const uint8_t range25cm64PRFnb[4][NUM_64M_OFFSET] =
{
// Ch 1 - range25cm64PRFnb
{
@@ -489,7 +489,7 @@
// range25cm64PRFwb: Range Bias Correction table for wide band channels at 64 MHz PRF, NB: !!!! each MUST END IN 255 !!!!
//---------------------------------------------------------------------------------------------------------------------------
-const uint8 range25cm64PRFwb[2][NUM_64M_OFFSETWB] =
+const uint8_t range25cm64PRFwb[2][NUM_64M_OFFSETWB] =
{
// Ch 4 - range25cm64PRFwb
{
@@ -633,7 +633,7 @@
*
* returns correction needed in meters
*/
-double dwt_getrangebias(uint8 chan, float range, uint8 prf)
+double dwt_getrangebias(uint8_t chan, float range, uint8_t prf)
{
// First get the lookup index that corresponds to given range for a particular channel at 16M PRF
int i = 0 ;
diff --git "a/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/decadriver/deca_regs.h" "b/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/decadriver/deca_regs.h"
index 9fda932..a9bbcb1 100644
--- "a/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/decadriver/deca_regs.h"
+++ "b/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/decadriver/deca_regs.h"
@@ -18,9 +18,6 @@
extern "C" {
#endif
-#include "deca_version.h"
-
-
/****************************************************************************//**
* @brief Bit definitions for register DEV_ID
**/
--
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