From 46542e0df74f8ba6d1ef7e19a16a371f52afb230 Mon Sep 17 00:00:00 2001
From: zhyinch <zhyinch@gmail.com>
Date: 星期一, 22 十月 2018 16:13:25 +0800
Subject: [PATCH] nothing
---
源码/核心板/Src/decadriver/deca_params_init.c | 75 +++++++++++++++++++------------------
1 files changed, 38 insertions(+), 37 deletions(-)
diff --git "a/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/decadriver/deca_params_init.c" "b/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/decadriver/deca_params_init.c"
index e63772d..244b29a 100644
--- "a/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/decadriver/deca_params_init.c"
+++ "b/\346\272\220\347\240\201/\346\240\270\345\277\203\346\235\277/Src/decadriver/deca_params_init.c"
@@ -22,21 +22,21 @@
//-----------------------------------------
// map the channel number to the index in the configuration arrays below
// 0th element is chan 1, 1st is chan 2, 2nd is chan 3, 3rd is chan 4, 4th is chan 5, 5th is chan 7
-const uint8 chan_idx[NUM_CH_SUPPORTED] = {0, 0, 1, 2, 3, 4, 0, 5};
+const uint8_t chan_idx[NUM_CH_SUPPORTED] = {0, 0, 1, 2, 3, 4, 0, 5};
//-----------------------------------------
-const uint32 tx_config[NUM_CH] =
+const uint32_t tx_config[NUM_CH] =
{
- RF_TXCTRL_CH1, /* Tx value match UM */
- RF_TXCTRL_CH2,
- RF_TXCTRL_CH3,
- RF_TXCTRL_CH4,
- RF_TXCTRL_CH5,
- RF_TXCTRL_CH7,
+ RF_TXCTRL_CH1, /* Tx value match UM */
+ RF_TXCTRL_CH2,
+ RF_TXCTRL_CH3,
+ RF_TXCTRL_CH4,
+ RF_TXCTRL_CH5,
+ RF_TXCTRL_CH7,
};
//RF -> Channel_Specific_Cfg -> Channel_Cfg -> RF_PLL -> RF PLL2
-const uint8 pll2_config[NUM_CH][5] =
+const uint8_t pll2_config[NUM_CH][5] =
{
{ 0x07, 0x04, 0x00, 0x09, 0x1E}, //3.5Ghz
@@ -53,7 +53,7 @@
//bandwidth configuration
-const uint8 rx_config[NUM_BW] =
+const uint8_t rx_config[NUM_BW] =
{
0xD8, //NBW
0xBC //WBW
@@ -68,10 +68,10 @@
};
-const uint8 dwnsSFDlen[NUM_BR] = { 0x40, 0x10, 0x08 }; //DW non-standard SFD length for 110k, 850k and 6.81M
+const uint8_t dwnsSFDlen[NUM_BR] = { 0x40, 0x10, 0x08 }; //DW non-standard SFD length for 110k, 850k and 6.81M
// SFD Threshold
-const uint16 sftsh[NUM_BR][NUM_SFD] =
+const uint16_t sftsh[NUM_BR][NUM_SFD] =
{
//110k
{
@@ -90,39 +90,40 @@
}
};
-const uint16 dtune1[NUM_PRF] =
+const uint16_t dtune1[NUM_PRF] =
{
0x0087, // 16 MHz PRF
0x008D // 64 MHz PRF
};
-const uint32 digital_bb_config[NUM_PRF][NUM_PACS] =
+const uint32_t digital_bb_config[NUM_PRF][NUM_PACS] =
+{
+ //16 PRF
{
- //16 PRF
- {
- //PAC 8
- 0x311A002D,
- //PAC 16
- 0x331A0052,
- //PAC 32
- 0x351A009A,
- //PAC 64
- 0x371A011D
- },
- //64 PRF
- {
- //PAC 8
- 0x313B006B,
- //PAC 16
- 0x333B00BE,
- //PAC 32
- 0x353B015E,
- //PAC 64
- 0x373B0296
- }
+ //PAC 8
+ 0x311A002D,
+ //PAC 16
+ 0x331A0052,
+ //PAC 32
+ 0x351A009A,
+ //PAC 64
+ 0x371A011D
+ },
+ //64 PRF
+ {
+ //PAC 8
+ 0x313B006B,
+ //PAC 16
+ 0x333B00BE,
+ //PAC 32
+ 0x353B015E,
+ //PAC 64
+ 0x373B0296
+ }
};
-const uint16 lde_replicaCoeff[PCODES] = {
+const uint16_t lde_replicaCoeff[PCODES] =
+{
// 0
(int)(0.0 * 65536),
--
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